From: Shuai Ruan <shuai.ruan@linux.intel.com>
To: xen-devel@lists.xen.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
Ian.Campbell@citrix.com, stefano.stabellini@eu.citrix.com,
jun.nakajima@intel.com, andrew.cooper3@citrix.com,
ian.jackson@eu.citrix.com, jbeulich@suse.com, keir@xen.org
Subject: [V8 1/4] x86/xsaves: add basic definitions/helpers to support xsaves
Date: Fri, 23 Oct 2015 17:48:18 +0800 [thread overview]
Message-ID: <1445593701-5300-2-git-send-email-shuai.ruan@linux.intel.com> (raw)
In-Reply-To: <1445593701-5300-1-git-send-email-shuai.ruan@linux.intel.com>
This patch add basic definitions/helpers which will be used in
later patches.
Signed-off-by: Shuai Ruan <shuai.ruan@linux.intel.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
xen/arch/x86/xstate.c | 19 +++++++++++++++++++
xen/include/asm-x86/hvm/vcpu.h | 1 +
xen/include/asm-x86/msr-index.h | 2 ++
xen/include/asm-x86/xstate.h | 12 ++++++++++--
4 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 9ddff90..add8c55 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -24,6 +24,9 @@ static u32 __read_mostly xsave_cntxt_size;
/* A 64-bit bitmask of the XSAVE/XRSTOR features supported by processor. */
u64 __read_mostly xfeature_mask;
+/* Cached xss for fast read */
+static DEFINE_PER_CPU(uint64_t, xss);
+
/* Cached xcr0 for fast read */
static DEFINE_PER_CPU(uint64_t, xcr0);
@@ -60,6 +63,22 @@ uint64_t get_xcr0(void)
return this_cpu(xcr0);
}
+void set_msr_xss(u64 xss)
+{
+ u64 *this_xss = &this_cpu(xss);
+
+ if ( *this_xss != xss )
+ {
+ wrmsrl(MSR_IA32_XSS, xss);
+ *this_xss = xss;
+ }
+}
+
+uint64_t get_msr_xss(void)
+{
+ return this_cpu(xss);
+}
+
void xsave(struct vcpu *v, uint64_t mask)
{
struct xsave_struct *ptr = v->arch.xsave_area;
diff --git a/xen/include/asm-x86/hvm/vcpu.h b/xen/include/asm-x86/hvm/vcpu.h
index f553814..de81f8a 100644
--- a/xen/include/asm-x86/hvm/vcpu.h
+++ b/xen/include/asm-x86/hvm/vcpu.h
@@ -173,6 +173,7 @@ struct hvm_vcpu {
u32 msr_tsc_aux;
u64 msr_tsc_adjust;
+ u64 msr_xss;
union {
struct arch_vmx_struct vmx;
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 65c1d02..b8ad93c 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -58,6 +58,8 @@
#define MSR_IA32_BNDCFGS 0x00000D90
+#define MSR_IA32_XSS 0x00000da0
+
#define MSR_MTRRfix64K_00000 0x00000250
#define MSR_MTRRfix16K_80000 0x00000258
#define MSR_MTRRfix16K_A0000 0x00000259
diff --git a/xen/include/asm-x86/xstate.h b/xen/include/asm-x86/xstate.h
index f0d8f0b..b95a5b5 100644
--- a/xen/include/asm-x86/xstate.h
+++ b/xen/include/asm-x86/xstate.h
@@ -19,8 +19,12 @@
#define XCR_XFEATURE_ENABLED_MASK 0x00000000 /* index of XCR0 */
+#define XSAVE_HDR_SIZE 64
+#define XSAVE_SSE_OFFSET 160
#define XSTATE_YMM_SIZE 256
-#define XSTATE_AREA_MIN_SIZE (512 + 64) /* FP/SSE + XSAVE.HEADER */
+#define FXSAVE_SIZE 512
+#define XSAVE_HDR_OFFSET FXSAVE_SIZE
+#define XSTATE_AREA_MIN_SIZE (FXSAVE_SIZE + XSAVE_HDR_SIZE)
#define XSTATE_FP (1ULL << 0)
#define XSTATE_SSE (1ULL << 1)
@@ -38,6 +42,7 @@
#define XSTATE_ALL (~(1ULL << 63))
#define XSTATE_NONLAZY (XSTATE_LWP | XSTATE_BNDREGS | XSTATE_BNDCSR)
#define XSTATE_LAZY (XSTATE_ALL & ~XSTATE_NONLAZY)
+#define XSTATE_COMPACTION_ENABLED (1ULL << 63)
extern u64 xfeature_mask;
@@ -68,7 +73,8 @@ struct __packed __attribute__((aligned (64))) xsave_struct
struct {
u64 xstate_bv;
- u64 reserved[7];
+ u64 xcomp_bv;
+ u64 reserved[6];
} xsave_hdr; /* The 64-byte header */
struct { char x[XSTATE_YMM_SIZE]; } ymm; /* YMM */
@@ -78,6 +84,8 @@ struct __packed __attribute__((aligned (64))) xsave_struct
/* extended state operations */
bool_t __must_check set_xcr0(u64 xfeatures);
uint64_t get_xcr0(void);
+void set_msr_xss(u64 xss);
+uint64_t get_msr_xss(void);
void xsave(struct vcpu *v, uint64_t mask);
void xrstor(struct vcpu *v, uint64_t mask);
bool_t xsave_enabled(const struct vcpu *v);
--
1.9.1
next prev parent reply other threads:[~2015-10-23 9:48 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-23 9:48 [V8 0/4] add xsaves/xrstors support Shuai Ruan
2015-10-23 9:48 ` Shuai Ruan [this message]
2015-10-23 9:48 ` [V8 2/4] x86/xsaves: enable xsaves/xrstors/xsavec in xen Shuai Ruan
2015-10-26 14:03 ` Jan Beulich
2015-10-27 1:06 ` Shuai Ruan
[not found] ` <20151027010626.GA13229@shuai.ruan@linux.intel.com>
2015-10-27 8:13 ` Jan Beulich
2015-10-27 9:01 ` Shuai Ruan
2015-10-29 7:58 ` Shuai Ruan
[not found] ` <20151029075857.GA24529@shuai.ruan@linux.intel.com>
2015-10-29 8:59 ` Jan Beulich
2015-10-29 9:47 ` Shuai Ruan
[not found] ` <20151029094702.GA27035@shuai.ruan@linux.intel.com>
2015-10-29 9:53 ` Jan Beulich
2015-10-29 9:57 ` Andrew Cooper
2015-10-23 9:48 ` [V8 3/4] x86/xsaves: enable xsaves/xrstors for hvm guest Shuai Ruan
2015-10-26 14:07 ` Jan Beulich
2015-10-23 9:48 ` [V8 4/4] libxc: expose xsaves/xgetbv1/xsavec to " Shuai Ruan
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