From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ander Conselvan de Oliveira Subject: [PATCH 04/22] drm/i915: Move register write into intel_dp_set_signal_levels() Date: Fri, 23 Oct 2015 13:01:47 +0300 Message-ID: <1445594525-7174-5-git-send-email-ander.conselvan.de.oliveira@intel.com> References: <1445594525-7174-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B59D7207C for ; Fri, 23 Oct 2015 03:02:20 -0700 (PDT) In-Reply-To: <1445594525-7174-1-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org, jim.bride@linux.intel.com, sivakumar.thulasimani@intel.com Cc: Ander Conselvan de Oliveira List-Id: intel-gfx@lists.freedesktop.org TW92ZSByZWdpc3RlciB3cml0ZSBmcm9tIGludGVsX2RwX3VwZGF0ZV9saW5rX3RyYWluKCkgaW50 bwppbnRlbF9kcF9zZXRfc2lnbmFsX2xldmVscygpLiBUaGlzIGNyZWF0ZXMgYSBiZXR0ZXIgc3Bs aXQgYmV0d2VlbiB0aGUKaTkxNSBzcGVjaWZpYyBjb2RlIGFuZCB0aGUgZ2VuZXJpYyBsaW5rIHRy YWluaW5nIHBhcnQuIE5vdGUgdGhhdCB0aGlzCmNhdXNlcyBhbiBleHRyYSByZWdpc3RlciB3cml0 ZSBpbiBpbnRlbF9kcF9yZXNldF9saW5rX3RyYWluKCksIHNpbmNlCmJvdGggaW50ZWxfZHBfc2V0 X3NpZ25hbF9sZXZlbHMoKSBhbmQgaW50ZWxfZHBfc2V0X2xpbmtfdHJhaW4oKSB3cml0ZQp0byB0 aGUgRFAgcmVnaXN0ZXIuCgpTaWduZWQtb2ZmLWJ5OiBBbmRlciBDb25zZWx2YW4gZGUgT2xpdmVp cmEgPGFuZGVyLmNvbnNlbHZhbi5kZS5vbGl2ZWlyYUBpbnRlbC5jb20+Ci0tLQogZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfZHAuYyB8IDExICsrKystLS0tLS0tCiAxIGZpbGUgY2hhbmdlZCwg NCBpbnNlcnRpb25zKCspLCA3IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1 L2RybS9pOTE1L2ludGVsX2RwLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kcC5jCmlu ZGV4IDExZjIzODUuLjRmZmIyZTMgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX2RwLmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYwpAQCAtMzU1MCwx MyArMzU1MCwxMyBAQCBnZW43X2VkcF9zaWduYWxfbGV2ZWxzKHVpbnQ4X3QgdHJhaW5fc2V0KQog CX0KIH0KIAotLyogUHJvcGVybHkgdXBkYXRlcyAiRFAiIHdpdGggdGhlIGNvcnJlY3Qgc2lnbmFs IGxldmVscy4gKi8KIHN0YXRpYyB2b2lkCiBpbnRlbF9kcF9zZXRfc2lnbmFsX2xldmVscyhzdHJ1 Y3QgaW50ZWxfZHAgKmludGVsX2RwKQogewogCXN0cnVjdCBpbnRlbF9kaWdpdGFsX3BvcnQgKmlu dGVsX2RpZ19wb3J0ID0gZHBfdG9fZGlnX3BvcnQoaW50ZWxfZHApOwogCWVudW0gcG9ydCBwb3J0 ID0gaW50ZWxfZGlnX3BvcnQtPnBvcnQ7CiAJc3RydWN0IGRybV9kZXZpY2UgKmRldiA9IGludGVs X2RpZ19wb3J0LT5iYXNlLmJhc2UuZGV2OworCXN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZf cHJpdiA9IHRvX2k5MTUoZGV2KTsKIAl1aW50MzJfdCBzaWduYWxfbGV2ZWxzLCBtYXNrID0gMDsK IAl1aW50OF90IHRyYWluX3NldCA9IGludGVsX2RwLT50cmFpbl9zZXRbMF07CiAKQEAgLTM1OTIs NiArMzU5Miw5IEBAIGludGVsX2RwX3NldF9zaWduYWxfbGV2ZWxzKHN0cnVjdCBpbnRlbF9kcCAq aW50ZWxfZHApCiAJCQlEUF9UUkFJTl9QUkVfRU1QSEFTSVNfU0hJRlQpOwogCiAJaW50ZWxfZHAt PkRQID0gKGludGVsX2RwLT5EUCAmIH5tYXNrKSB8IHNpZ25hbF9sZXZlbHM7CisKKwlJOTE1X1dS SVRFKGludGVsX2RwLT5vdXRwdXRfcmVnLCBpbnRlbF9kcC0+RFApOworCVBPU1RJTkdfUkVBRChp bnRlbF9kcC0+b3V0cHV0X3JlZyk7CiB9CiAKIHN0YXRpYyB2b2lkCkBAIC0zNjQ3LDE2ICszNjUw LDEwIEBAIGludGVsX2RwX3Jlc2V0X2xpbmtfdHJhaW4oc3RydWN0IGludGVsX2RwICppbnRlbF9k cCwKIHN0YXRpYyBib29sCiBpbnRlbF9kcF91cGRhdGVfbGlua190cmFpbihzdHJ1Y3QgaW50ZWxf ZHAgKmludGVsX2RwKQogewotCXN0cnVjdCBpbnRlbF9kaWdpdGFsX3BvcnQgKmludGVsX2RpZ19w b3J0ID0gZHBfdG9fZGlnX3BvcnQoaW50ZWxfZHApOwotCXN0cnVjdCBkcm1faTkxNV9wcml2YXRl ICpkZXZfcHJpdiA9Ci0JCXRvX2k5MTUoaW50ZWxfZGlnX3BvcnQtPmJhc2UuYmFzZS5kZXYpOwog CWludCByZXQ7CiAKIAlpbnRlbF9kcF9zZXRfc2lnbmFsX2xldmVscyhpbnRlbF9kcCk7CiAKLQlJ OTE1X1dSSVRFKGludGVsX2RwLT5vdXRwdXRfcmVnLCBpbnRlbF9kcC0+RFApOwotCVBPU1RJTkdf UkVBRChpbnRlbF9kcC0+b3V0cHV0X3JlZyk7Ci0KIAlyZXQgPSBkcm1fZHBfZHBjZF93cml0ZSgm aW50ZWxfZHAtPmF1eCwgRFBfVFJBSU5JTkdfTEFORTBfU0VULAogCQkJCWludGVsX2RwLT50cmFp bl9zZXQsIGludGVsX2RwLT5sYW5lX2NvdW50KTsKIAotLSAKMi40LjMKCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QK SW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Au b3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==