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From: Stephen Warren <swarren@wwwdotorg.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V2 7/7] ARM: tegra: error check Tegra210 XUSB padctl waits
Date: Fri, 23 Oct 2015 10:50:53 -0600	[thread overview]
Message-ID: <1445619053-2167-7-git-send-email-swarren@wwwdotorg.org> (raw)
In-Reply-To: <1445619053-2167-1-git-send-email-swarren@wwwdotorg.org>

From: Stephen Warren <swarren@nvidia.com>

Add code to detect timeouts when waiting for HW events such as PLL
lock done. Any errors are logged and trigger an error return code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/tegra210/xusb-padctl.c | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index 6022f1614bda..9ec93e7c4c4c 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -279,7 +279,10 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy)
 		if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE)
 			break;
 	}
-
+	if (!(value & XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE)) {
+		debug("  timeout\n");
+		return -ETIMEDOUT;
+	}
 	debug("  done\n");
 
 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
@@ -295,7 +298,10 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy)
 		if ((value & XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE) == 0)
 			break;
 	}
-
+	if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_DONE) {
+		debug("  timeout\n");
+		return -ETIMEDOUT;
+	}
 	debug("  done\n");
 
 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
@@ -310,7 +316,10 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy)
 		if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL1_LOCKDET_STATUS)
 			break;
 	}
-
+	if (!(value & XUSB_PADCTL_UPHY_PLL_P0_CTL1_LOCKDET_STATUS)) {
+		debug("  timeout\n");
+		return -ETIMEDOUT;
+	}
 	debug("  done\n");
 
 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
@@ -326,7 +335,10 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy)
 		if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE)
 			break;
 	}
-
+	if (!(value & XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE)) {
+		debug("  timeout\n");
+		return -ETIMEDOUT;
+	}
 	debug("  done\n");
 
 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
@@ -341,7 +353,10 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy)
 		if ((value & XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE) == 0)
 			break;
 	}
-
+	if (value & XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_DONE) {
+		debug("  timeout\n");
+		return -ETIMEDOUT;
+	}
 	debug("  done\n");
 
 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
-- 
1.9.1

  parent reply	other threads:[~2015-10-23 16:50 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-23 16:50 [U-Boot] [PATCH V2 1/7] ARM: tegra: rename dummy XUSB padctl implementation Stephen Warren
2015-10-23 16:50 ` [U-Boot] [PATCH V2 2/7] ARM: tegra: clean up XUSB padctl error() calls Stephen Warren
2015-10-29 17:15   ` Simon Glass
2015-10-23 16:50 ` [U-Boot] [PATCH V2 3/7] ARM: tegra: create common XUSB padctl driver file Stephen Warren
2015-10-29 17:15   ` Simon Glass
2015-10-23 16:50 ` [U-Boot] [PATCH V2 4/7] ARM: tegra: parameterize common XUSB code Stephen Warren
2015-10-29 17:16   ` Simon Glass
2015-10-23 16:50 ` [U-Boot] [PATCH V2 5/7] ARM: tegra: switch Tegra210 to common XUSB padctl Stephen Warren
2015-10-29 17:16   ` Simon Glass
2015-10-23 16:50 ` [U-Boot] [PATCH V2 6/7] ARM: tegra: add lane tables to Tegra210 " Stephen Warren
2015-10-29 17:16   ` Simon Glass
2015-10-23 16:50 ` Stephen Warren [this message]
2015-10-29 17:16   ` [U-Boot] [PATCH V2 7/7] ARM: tegra: error check Tegra210 XUSB padctl waits Simon Glass
2015-10-29 17:15 ` [U-Boot] [PATCH V2 1/7] ARM: tegra: rename dummy XUSB padctl implementation Simon Glass

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