From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755367AbbJ1DWp (ORCPT ); Tue, 27 Oct 2015 23:22:45 -0400 Received: from gate.crashing.org ([63.228.1.57]:60927 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755252AbbJ1DWh (ORCPT ); Tue, 27 Oct 2015 23:22:37 -0400 Message-ID: <1446002458.1856.25.camel@kernel.crashing.org> Subject: Re: [PATCH 2/7 v2] powerpc/dma-mapping: override dma_get_page_shift From: Benjamin Herrenschmidt To: Nishanth Aravamudan Cc: Alexey Kardashevskiy , Michael Ellerman , Matthew Wilcox , Keith Busch , Paul Mackerras , David Gibson , Christoph Hellwig , "David S. Miller" , linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org Date: Wed, 28 Oct 2015 12:20:58 +0900 In-Reply-To: <20151028023028.GI7716@linux.vnet.ibm.com> References: <20151023205420.GA10197@linux.vnet.ibm.com> <20151023205718.GC10197@linux.vnet.ibm.com> <562F1368.1030204@ozlabs.ru> <20151027222706.GF7716@linux.vnet.ibm.com> <56301E24.1060304@ozlabs.ru> <20151028015451.GH7716@linux.vnet.ibm.com> <1445998805.1856.24.camel@kernel.crashing.org> <20151028023028.GI7716@linux.vnet.ibm.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.16.5 (3.16.5-3.fc22) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2015-10-27 at 19:30 -0700, Nishanth Aravamudan wrote: > On 28.10.2015 [11:20:05 +0900], Benjamin Herrenschmidt wrote: > > On Tue, 2015-10-27 at 18:54 -0700, Nishanth Aravamudan wrote: > > > > > > In "bypass" mode, what TCE size is used? Is it guaranteed to be > > > 4K? > > > > None :-) The TCEs are completely bypassed. You get a N:M linear > > mapping > > of all memory starting at 1<<59 PCI side. > > Err, duh, sorry! Ok, so in that case, DMA page shift is PAGE_SHIFT, > then? I think so. Cheers, Ben. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benjamin Herrenschmidt Date: Wed, 28 Oct 2015 03:20:58 +0000 Subject: Re: [PATCH 2/7 v2] powerpc/dma-mapping: override dma_get_page_shift Message-Id: <1446002458.1856.25.camel@kernel.crashing.org> List-Id: References: <20151023205420.GA10197@linux.vnet.ibm.com> <20151023205718.GC10197@linux.vnet.ibm.com> <562F1368.1030204@ozlabs.ru> <20151027222706.GF7716@linux.vnet.ibm.com> <56301E24.1060304@ozlabs.ru> <20151028015451.GH7716@linux.vnet.ibm.com> <1445998805.1856.24.camel@kernel.crashing.org> <20151028023028.GI7716@linux.vnet.ibm.com> In-Reply-To: <20151028023028.GI7716@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: sparclinux@vger.kernel.org On Tue, 2015-10-27 at 19:30 -0700, Nishanth Aravamudan wrote: > On 28.10.2015 [11:20:05 +0900], Benjamin Herrenschmidt wrote: > > On Tue, 2015-10-27 at 18:54 -0700, Nishanth Aravamudan wrote: > > > > > > In "bypass" mode, what TCE size is used? Is it guaranteed to be > > > 4K? > > > > None :-) The TCEs are completely bypassed. You get a N:M linear > > mapping > > of all memory starting at 1<<59 PCI side. > > Err, duh, sorry! Ok, so in that case, DMA page shift is PAGE_SHIFT, > then? I think so. Cheers, Ben. From mboxrd@z Thu Jan 1 00:00:00 1970 From: benh@kernel.crashing.org (Benjamin Herrenschmidt) Date: Wed, 28 Oct 2015 12:20:58 +0900 Subject: [PATCH 2/7 v2] powerpc/dma-mapping: override dma_get_page_shift In-Reply-To: <20151028023028.GI7716@linux.vnet.ibm.com> References: <20151023205420.GA10197@linux.vnet.ibm.com> <20151023205718.GC10197@linux.vnet.ibm.com> <562F1368.1030204@ozlabs.ru> <20151027222706.GF7716@linux.vnet.ibm.com> <56301E24.1060304@ozlabs.ru> <20151028015451.GH7716@linux.vnet.ibm.com> <1445998805.1856.24.camel@kernel.crashing.org> <20151028023028.GI7716@linux.vnet.ibm.com> Message-ID: <1446002458.1856.25.camel@kernel.crashing.org> On Tue, 2015-10-27@19:30 -0700, Nishanth Aravamudan wrote: > On 28.10.2015 [11:20:05 +0900], Benjamin Herrenschmidt wrote: > > On Tue, 2015-10-27@18:54 -0700, Nishanth Aravamudan wrote: > > > > > > In "bypass" mode, what TCE size is used? Is it guaranteed to be > > > 4K? > > > > None :-) The TCEs are completely bypassed. You get a N:M linear > > mapping > > of all memory starting at 1<<59 PCI side. > > Err, duh, sorry! Ok, so in that case, DMA page shift is PAGE_SHIFT, > then? I think so. Cheers, Ben.