[PATCH v2 0/2] Patches to fix remote wakeup on rk3288 dwc2 "host" port

[PATCH v2 0/2] Patches to fix remote wakeup on rk3288 dwc2 "host" port

[Douglas Anderson]

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

I've tested this series atop a bit of a conglomeration of Heiko's github
"somewhat stable" branch (v4.3-rc3-876-g6509232) but with Greg KH's
usb-next merged in.

===

I've posted up a bunch of patches recently but tried to keep them in
separate series where it makes sense.  A summary of known patches:
All patches can be found with: https://patchwork.kernel.org/patch/<ID>/

ACKed (thanks!) and not yet landed:
 7453801  usb: dwc2: host: Fix ahbcfg for rk3066
 7467521  usb: dwc2: host: Fix remote wakeup when not in DWC2_L2

Important, not yet reviewed:
 7421171  [1/2] usb: dwc2: host: Fix missing device insertions

Fixes no known issues, not yet reviewed:
 7421181  [2/2] usb: dwc2: host: Clear interrupts before handling them

Optimization to reduce probe time (may require simple rebase):
 7348131  [1/5] usb: dwc2: Restore GUSBCFG in dwc2_get_hwparams()
 7348221  [2/5] usb: dwc2: reset dwc2 core before dwc2_get_hwparams()
 7348191  [3/5] CHROMIUM: usb: dwc2: Avoid double-reset at boot time
 7348211  [4/5] usb: dwc2: Speed dwc2_get_hwparams() on some host-only ports
 7348201  [5/5] usb: dwc2: reduce dwc2 driver probe time
 7355241  usb: dwc2: Avoid more calls to dwc2_core_reset()

This series:
 usb: dwc2: optionally assert phy "full reset" when waking up
 ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

Coming soon:
 RFT: usb: dwc2: bus suspend/resume that's not hibernate

Abandoned for now (can't get wakeup to work on mainline):
 6727091  [REPOST,1/3] USB: Export usb_wakeup_enabled_descendants()
 6727101  [REPOST,2/3] Documentation: dt-bindings: Add snps,need-phy-for-wake for dwc2 USB
 6727121  [REPOST,3/3] USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled

Changes in v2:
- Use a full PHY reset for safety; no PHY changes needed for that.
- Cover letter explains outstanding patches

Doug Anderson (2):
  usb: dwc2: optionally assert phy "full reset" when waking up
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
 arch/arm/boot/dts/rk3288.dtsi                  |  5 +++++
 drivers/usb/dwc2/core.h                        |  5 +++++
 drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
 drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
 5 files changed, 44 insertions(+)

-- 
2.6.0.rc2.230.g3dd15c0

[PATCH v2 0/2] Patches to fix remote wakeup on rk3288 dwc2 "host" port

[Douglas Anderson]

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

I've tested this series atop a bit of a conglomeration of Heiko's github
"somewhat stable" branch (v4.3-rc3-876-g6509232) but with Greg KH's
usb-next merged in.

===

I've posted up a bunch of patches recently but tried to keep them in
separate series where it makes sense.  A summary of known patches:
All patches can be found with: https://patchwork.kernel.org/patch/<ID>/

ACKed (thanks!) and not yet landed:
 7453801  usb: dwc2: host: Fix ahbcfg for rk3066
 7467521  usb: dwc2: host: Fix remote wakeup when not in DWC2_L2

Important, not yet reviewed:
 7421171  [1/2] usb: dwc2: host: Fix missing device insertions

Fixes no known issues, not yet reviewed:
 7421181  [2/2] usb: dwc2: host: Clear interrupts before handling them

Optimization to reduce probe time (may require simple rebase):
 7348131  [1/5] usb: dwc2: Restore GUSBCFG in dwc2_get_hwparams()
 7348221  [2/5] usb: dwc2: reset dwc2 core before dwc2_get_hwparams()
 7348191  [3/5] CHROMIUM: usb: dwc2: Avoid double-reset at boot time
 7348211  [4/5] usb: dwc2: Speed dwc2_get_hwparams() on some host-only ports
 7348201  [5/5] usb: dwc2: reduce dwc2 driver probe time
 7355241  usb: dwc2: Avoid more calls to dwc2_core_reset()

This series:
 usb: dwc2: optionally assert phy "full reset" when waking up
 ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

Coming soon:
 RFT: usb: dwc2: bus suspend/resume that's not hibernate

Abandoned for now (can't get wakeup to work on mainline):
 6727091  [REPOST,1/3] USB: Export usb_wakeup_enabled_descendants()
 6727101  [REPOST,2/3] Documentation: dt-bindings: Add snps,need-phy-for-wake for dwc2 USB
 6727121  [REPOST,3/3] USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled

Changes in v2:
- Use a full PHY reset for safety; no PHY changes needed for that.
- Cover letter explains outstanding patches

Doug Anderson (2):
  usb: dwc2: optionally assert phy "full reset" when waking up
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
 arch/arm/boot/dts/rk3288.dtsi                  |  5 +++++
 drivers/usb/dwc2/core.h                        |  5 +++++
 drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
 drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
 5 files changed, 44 insertions(+)

-- 
2.6.0.rc2.230.g3dd15c0

[PATCH v2 0/2] Patches to fix remote wakeup on rk3288 dwc2 "host" port

[Douglas Anderson]

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

I've tested this series atop a bit of a conglomeration of Heiko's github
"somewhat stable" branch (v4.3-rc3-876-g6509232) but with Greg KH's
usb-next merged in.

===

I've posted up a bunch of patches recently but tried to keep them in
separate series where it makes sense.  A summary of known patches:
All patches can be found with: https://patchwork.kernel.org/patch/<ID>/

ACKed (thanks!) and not yet landed:
 7453801  usb: dwc2: host: Fix ahbcfg for rk3066
 7467521  usb: dwc2: host: Fix remote wakeup when not in DWC2_L2

Important, not yet reviewed:
 7421171  [1/2] usb: dwc2: host: Fix missing device insertions

Fixes no known issues, not yet reviewed:
 7421181  [2/2] usb: dwc2: host: Clear interrupts before handling them

Optimization to reduce probe time (may require simple rebase):
 7348131  [1/5] usb: dwc2: Restore GUSBCFG in dwc2_get_hwparams()
 7348221  [2/5] usb: dwc2: reset dwc2 core before dwc2_get_hwparams()
 7348191  [3/5] CHROMIUM: usb: dwc2: Avoid double-reset at boot time
 7348211  [4/5] usb: dwc2: Speed dwc2_get_hwparams() on some host-only ports
 7348201  [5/5] usb: dwc2: reduce dwc2 driver probe time
 7355241  usb: dwc2: Avoid more calls to dwc2_core_reset()

This series:
 usb: dwc2: optionally assert phy "full reset" when waking up
 ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

Coming soon:
 RFT: usb: dwc2: bus suspend/resume that's not hibernate

Abandoned for now (can't get wakeup to work on mainline):
 6727091  [REPOST,1/3] USB: Export usb_wakeup_enabled_descendants()
 6727101  [REPOST,2/3] Documentation: dt-bindings: Add snps,need-phy-for-wake for dwc2 USB
 6727121  [REPOST,3/3] USB: dwc2: Don't turn off the usbphy in suspend if wakeup is enabled

Changes in v2:
- Use a full PHY reset for safety; no PHY changes needed for that.
- Cover letter explains outstanding patches

Doug Anderson (2):
  usb: dwc2: optionally assert phy "full reset" when waking up
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
 arch/arm/boot/dts/rk3288.dtsi                  |  5 +++++
 drivers/usb/dwc2/core.h                        |  5 +++++
 drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
 drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
 5 files changed, 44 insertions(+)

-- 
2.6.0.rc2.230.g3dd15c0

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[PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Douglas Anderson]

From: Doug Anderson <dianders@chromium.org>

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
---
Changes in v2:
- Use a full PHY reset for safety; no PHY changes needed for that.

 Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
 drivers/usb/dwc2/core.h                        |  5 +++++
 drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
 drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
 4 files changed, 39 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
index fd132cbee70e..0de78c48c12d 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -17,6 +17,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
 Optional properties:
 - phys: phy provider specifier
 - phy-names: shall be "usb2-phy"
+- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
+  the PHY when we detect a wakeup due to a hardware errata.  If present you
+  must specify a "phy-full-reset" reset.
+
+Resets:
+- phy-full-reset (optional): Fully resets the PHY.
+
 Refer to phy/phy-bindings.txt for generic phy consumer properties
 - dr_mode: shall be one of "host", "peripheral" and "otg"
   Refer to usb/generic.txt
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index a66d3cb62b65..ce1ef961ae6c 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -582,8 +582,11 @@ struct dwc2_hregs_backup {
  * @hcd_enabled		Host mode sub-driver initialization indicator.
  * @gadget_enabled	Peripheral mode sub-driver initialization indicator.
  * @ll_hw_enabled	Status of low-level hardware resources.
+ * @need_phy_full_reset_on_wake: Quirk saying that we should assert
+ *                               phy_full_reset on a remote wakeup.
  * @phy:                The otg phy transceiver structure for phy control.
  * @uphy:               The otg phy transceiver structure for old USB phy control.
+ * @phy_full_reset:     Reset control for the PHY's "full reset".
  * @plat:               The platform specific configuration data. This can be removed once
  *                      all SoCs support usb transceiver.
  * @supplies:           Definition of USB power supplies
@@ -710,9 +713,11 @@ struct dwc2_hsotg {
 	unsigned int hcd_enabled:1;
 	unsigned int gadget_enabled:1;
 	unsigned int ll_hw_enabled:1;
+	unsigned int need_phy_full_reset_on_wake:1;
 
 	struct phy *phy;
 	struct usb_phy *uphy;
+	struct reset_control *phy_full_reset;
 	struct dwc2_hsotg_plat *plat;
 	struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)];
 	u32 phyif;
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 27daa42788b1..275484260192 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -45,6 +45,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/reset.h>
 #include <linux/usb.h>
 
 #include <linux/usb/hcd.h>
@@ -378,6 +379,19 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/*
+			 * If we've got this quirk then the PHY is stuck upon
+			 * wakeup.  Assert reset.  This will propagate out and
+			 * eventually we'll re-enumerate the device.  Not great
+			 * but the best we can do.
+			 */
+			if (hsotg->need_phy_full_reset_on_wake) {
+				reset_control_assert(hsotg->phy_full_reset);
+				udelay(50);
+				reset_control_deassert(hsotg->phy_full_reset);
+			}
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index 5859b0fa19ee..1379b9cb0d39 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -45,6 +45,7 @@
 #include <linux/platform_device.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/reset.h>
 
 #include <linux/usb/of.h>
 
@@ -376,6 +377,18 @@ static int dwc2_driver_probe(struct platform_device *dev)
 			"Configuration mismatch. Forcing peripheral mode\n");
 	}
 
+	hsotg->need_phy_full_reset_on_wake =
+		of_property_read_bool(dev->dev.of_node,
+				      "snps,need-phy-full-reset-on-wake");
+	hsotg->phy_full_reset = devm_reset_control_get(hsotg->dev,
+						       "phy-full-reset");
+	if (IS_ERR(hsotg->phy_full_reset) &&
+	    hsotg->need_phy_full_reset_on_wake) {
+		dev_warn(hsotg->dev, "Missing phy full reset (%ld); skipping\n",
+			 PTR_ERR(hsotg->phy_full_reset));
+		hsotg->need_phy_full_reset_on_wake = false;
+	}
+
 	retval = dwc2_lowlevel_hw_init(hsotg);
 	if (retval)
 		return retval;
-- 
2.6.0.rc2.230.g3dd15c0

Re: [PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Rob Herring]

On Fri, Oct 30, 2015 at 3:17 PM, Douglas Anderson <dianders@chromium.org> wrote:
> From: Doug Anderson <dianders@chromium.org>
>
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend).

I would think re-enumerating means autosuspend is broken.

> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
>
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit), which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).

The reset from the CRU goes to the PHY, correct? Therefore, the
binding should reflect that. Connecting it to the host controller is a
hack.

So describe the reset connection properly and then add a .phy_reset()
hook to the phy subsystem. Then call that when flag property you added
is set.

Rob

Re: [PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Rob Herring]

On Fri, Oct 30, 2015 at 3:17 PM, Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> wrote:
> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend).

I would think re-enumerating means autosuspend is broken.

> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
>
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit), which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).

The reset from the CRU goes to the PHY, correct? Therefore, the
binding should reflect that. Connecting it to the host controller is a
hack.

So describe the reset connection properly and then add a .phy_reset()
hook to the phy subsystem. Then call that when flag property you added
is set.

Rob
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Re: [PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Doug Anderson]

Rob,

On Mon, Nov 2, 2015 at 8:12 AM, Rob Herring <robh+dt@kernel.org> wrote:
> On Fri, Oct 30, 2015 at 3:17 PM, Douglas Anderson <dianders@chromium.org> wrote:
>> From: Doug Anderson <dianders@chromium.org>
>>
>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>> port) the PHY can get into a bad state when a wakeup is asserted (not
>> just a wakeup from full system suspend but also a wakeup from
>> autosuspend).
>
> I would think re-enumerating means autosuspend is broken.

Yes, it is broken on this port.  I've been trying to figure out how to
disable autosuspend at the driver level.  Until then we can do it with
udev rules but that's much less ideal.

On our current system we have autosuispend turned off for most things
via udev and laptop-mode-tools.  ...so really the only case we see
this reset happen is if an empty hub is plugged in and then you plug
something into the hub.  The reset isn't terrible and is much better
than the device getting stuck.

You can also see the reset doing its thing if you fully suspend the
system and try to wake up from a keyboard or a mouse attached to the
port.  Being able to wake up (and then seeing a reset) is still better
than not being able to wake up.


>> We can get the PHY out of its bad state by asserting its "port reset",
>> but unfortunately that seems to assert a reset onto the USB bus so it
>> could confuse things if we don't actually deenumerate / reenumerate the
>> device.
>>
>> We can also get the PHY out of its bad state by fully resetting it using
>> the reset from the CRU (clock reset unit), which does a more full
>> reset.  The CRU-based reset appears to actually cause devices on the bus
>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>> way).
>
> The reset from the CRU goes to the PHY, correct? Therefore, the
> binding should reflect that. Connecting it to the host controller is a
> hack.
>
> So describe the reset connection properly and then add a .phy_reset()
> hook to the phy subsystem. Then call that when flag property you added
> is set.

As per previous email, I disagree.  The fact that there may be more
than one reset exposed from the PHY and that there is not a tightly
coupled relationship between a PHY driver and a USB driver means that
we would need to re-invent the reset API on top of the PHY API.  In my
case I am exposing a single reset at the moment, but there may be
reasons to expose additional "PHY" resets in the future.

http://www.gossamer-threads.com/lists/linux/kernel/2289780#2289780

...using the existing reset API seems better.

Re: [PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Rob Herring]

On Mon, Nov 2, 2015 at 10:22 AM, Doug Anderson <dianders@chromium.org> wrote:
> Rob,
>
> On Mon, Nov 2, 2015 at 8:12 AM, Rob Herring <robh+dt@kernel.org> wrote:
>> On Fri, Oct 30, 2015 at 3:17 PM, Douglas Anderson <dianders@chromium.org> wrote:
>>> From: Doug Anderson <dianders@chromium.org>

>>> We can get the PHY out of its bad state by asserting its "port reset",
>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>> could confuse things if we don't actually deenumerate / reenumerate the
>>> device.
>>>
>>> We can also get the PHY out of its bad state by fully resetting it using
>>> the reset from the CRU (clock reset unit), which does a more full
>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>> way).
>>
>> The reset from the CRU goes to the PHY, correct? Therefore, the
>> binding should reflect that. Connecting it to the host controller is a
>> hack.
>>
>> So describe the reset connection properly and then add a .phy_reset()
>> hook to the phy subsystem. Then call that when flag property you added
>> is set.
>
> As per previous email, I disagree.  The fact that there may be more
> than one reset exposed from the PHY and that there is not a tightly
> coupled relationship between a PHY driver and a USB driver means that
> we would need to re-invent the reset API on top of the PHY API.  In my
> case I am exposing a single reset at the moment, but there may be
> reasons to expose additional "PHY" resets in the future.

Your previous approach was completely different. I was not arguing
that the PHY driving reset to the host was wrong use of reset binding,
just that it was an overkill. Now, it is just flat wrong unless you
convince me that SRST_USBHOST1_PHY is a connection to the host rather
than the PHY.

Rob

Re: [PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Doug Anderson]

Hi,

On Mon, Nov 2, 2015 at 9:16 AM, Rob Herring <robh+dt@kernel.org> wrote:
> On Mon, Nov 2, 2015 at 10:22 AM, Doug Anderson <dianders@chromium.org> wrote:
>> Rob,
>>
>> On Mon, Nov 2, 2015 at 8:12 AM, Rob Herring <robh+dt@kernel.org> wrote:
>>> On Fri, Oct 30, 2015 at 3:17 PM, Douglas Anderson <dianders@chromium.org> wrote:
>>>> From: Doug Anderson <dianders@chromium.org>
>
>>>> We can get the PHY out of its bad state by asserting its "port reset",
>>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>>> could confuse things if we don't actually deenumerate / reenumerate the
>>>> device.
>>>>
>>>> We can also get the PHY out of its bad state by fully resetting it using
>>>> the reset from the CRU (clock reset unit), which does a more full
>>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>>> way).
>>>
>>> The reset from the CRU goes to the PHY, correct? Therefore, the
>>> binding should reflect that. Connecting it to the host controller is a
>>> hack.
>>>
>>> So describe the reset connection properly and then add a .phy_reset()
>>> hook to the phy subsystem. Then call that when flag property you added
>>> is set.
>>
>> As per previous email, I disagree.  The fact that there may be more
>> than one reset exposed from the PHY and that there is not a tightly
>> coupled relationship between a PHY driver and a USB driver means that
>> we would need to re-invent the reset API on top of the PHY API.  In my
>> case I am exposing a single reset at the moment, but there may be
>> reasons to expose additional "PHY" resets in the future.
>
> Your previous approach was completely different. I was not arguing
> that the PHY driving reset to the host was wrong use of reset binding,
> just that it was an overkill. Now, it is just flat wrong unless you
> convince me that SRST_USBHOST1_PHY is a connection to the host rather
> than the PHY.

It still seems to me that the argument that there can be multiple
types of "phy reset" is still a sane argument.  Just because we
currently happen to need the one that resets the whole PHY now doesn't
mean that we won't need other different resets later.

...and if you're exposing multiple different resets, then the reset
API is the best one to use.

I _could_ see the argument that perhaps the reset should pass through
the PHY driver so that it could possibly in the future be aware of the
reset.  That is: the SRST could use the reset API to expose the PHY
reset to the PHY driver and then the PHY driver could in turn expose
the PHY reset (using the reset API) to the dwc2 driver.  At the moment
this would be a complete pass through, but structuring it that way
would later allow the PHY to do something with the reset.  How about
that?

-Doug

Re: [PATCH v2 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Doug Anderson]

Hi,

On Mon, Nov 2, 2015 at 9:16 AM, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> On Mon, Nov 2, 2015 at 10:22 AM, Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> wrote:
>> Rob,
>>
>> On Mon, Nov 2, 2015 at 8:12 AM, Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
>>> On Fri, Oct 30, 2015 at 3:17 PM, Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> wrote:
>>>> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>
>>>> We can get the PHY out of its bad state by asserting its "port reset",
>>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>>> could confuse things if we don't actually deenumerate / reenumerate the
>>>> device.
>>>>
>>>> We can also get the PHY out of its bad state by fully resetting it using
>>>> the reset from the CRU (clock reset unit), which does a more full
>>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>>> way).
>>>
>>> The reset from the CRU goes to the PHY, correct? Therefore, the
>>> binding should reflect that. Connecting it to the host controller is a
>>> hack.
>>>
>>> So describe the reset connection properly and then add a .phy_reset()
>>> hook to the phy subsystem. Then call that when flag property you added
>>> is set.
>>
>> As per previous email, I disagree.  The fact that there may be more
>> than one reset exposed from the PHY and that there is not a tightly
>> coupled relationship between a PHY driver and a USB driver means that
>> we would need to re-invent the reset API on top of the PHY API.  In my
>> case I am exposing a single reset at the moment, but there may be
>> reasons to expose additional "PHY" resets in the future.
>
> Your previous approach was completely different. I was not arguing
> that the PHY driving reset to the host was wrong use of reset binding,
> just that it was an overkill. Now, it is just flat wrong unless you
> convince me that SRST_USBHOST1_PHY is a connection to the host rather
> than the PHY.

It still seems to me that the argument that there can be multiple
types of "phy reset" is still a sane argument.  Just because we
currently happen to need the one that resets the whole PHY now doesn't
mean that we won't need other different resets later.

...and if you're exposing multiple different resets, then the reset
API is the best one to use.

I _could_ see the argument that perhaps the reset should pass through
the PHY driver so that it could possibly in the future be aware of the
reset.  That is: the SRST could use the reset API to expose the PHY
reset to the PHY driver and then the PHY driver could in turn expose
the PHY reset (using the reset API) to the dwc2 driver.  At the moment
this would be a complete pass through, but structuring it that way
would later allow the PHY to do something with the reset.  How about
that?

-Doug
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[PATCH v3 0/2] usb: dwc2: fix the usb host for host port at RK3288

[Randy Li]

Hi, the implementation of Doug is thought quick but the Herring 
want to use this problem in autosuspend. Unfortunately, It is a fault
in hardware, onyl would happened at Rockchip RK3288 now.

So I suggest to accept this idea. It may be better if dropped
the dts,  as it is an issue only for RK3288, just hard-code to
source code. If maintainer would agree with the later one, I would
send the other version to the list.

Thank you for using of Rockchip.

Doug Anderson (2):
  usb: dwc2: optionally assert phy "full reset" when waking up
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
 arch/arm/boot/dts/rk3288.dtsi                  |  5 +++++
 drivers/usb/dwc2/core.h                        |  5 +++++
 drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
 drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
 5 files changed, 44 insertions(+)

-- 
2.7.4


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[PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Randy Li]

From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend). The problem is caused by a design fault in IC, Rockchip
have confirmed it and fix this problem in the future IC model.

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit), which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---
 Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
 drivers/usb/dwc2/core.h                        |  5 +++++
 drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
 drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
 4 files changed, 39 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
index 20a68bf..40c63ae 100644
--- a/Documentation/devicetree/bindings/usb/dwc2.txt
+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
@@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
 Optional properties:
 - phys: phy provider specifier
 - phy-names: shall be "usb2-phy"
+- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
+  the PHY when we detect a wakeup due to a hardware errata.  If present you
+  must specify a "phy-full-reset" reset.
+
+Resets:
+- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).
+
 Refer to phy/phy-bindings.txt for generic phy consumer properties
 - dr_mode: shall be one of "host", "peripheral" and "otg"
   Refer to usb/generic.txt
diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index dec0b21..951abe0 100644
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -719,8 +719,11 @@ struct dwc2_hregs_backup {
  * @hcd_enabled		Host mode sub-driver initialization indicator.
  * @gadget_enabled	Peripheral mode sub-driver initialization indicator.
  * @ll_hw_enabled	Status of low-level hardware resources.
+ * @need_phy_full_reset_on_wake: Quirk saying that we should assert
+ *                               phy_full_reset on a remote wakeup.
  * @phy:                The otg phy transceiver structure for phy control.
  * @uphy:               The otg phy transceiver structure for old USB phy control.
+ * @phy_full_reset:     Reset control for the PHY's "full reset".
  * @plat:               The platform specific configuration data. This can be removed once
  *                      all SoCs support usb transceiver.
  * @supplies:           Definition of USB power supplies
@@ -853,9 +856,11 @@ struct dwc2_hsotg {
 	unsigned int hcd_enabled:1;
 	unsigned int gadget_enabled:1;
 	unsigned int ll_hw_enabled:1;
+	unsigned int need_phy_full_reset_on_wake:1;
 
 	struct phy *phy;
 	struct usb_phy *uphy;
+	struct reset_control *phy_full_reset;
 	struct dwc2_hsotg_plat *plat;
 	struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)];
 	u32 phyif;
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9..53d8327 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -45,6 +45,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/reset.h>
 #include <linux/usb.h>
 
 #include <linux/usb/hcd.h>
@@ -379,6 +380,19 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/*
+			 * If we've got this quirk then the PHY is stuck upon
+			 * wakeup.  Assert reset.  This will propagate out and
+			 * eventually we'll re-enumerate the device.  Not great
+			 * but the best we can do.
+			 */
+			if (hsotg->need_phy_full_reset_on_wake) {
+				reset_control_assert(hsotg->phy_full_reset);
+				udelay(50);
+				reset_control_deassert(hsotg->phy_full_reset);
+			}
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index fc6f525..d8894a1 100644
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -45,6 +45,7 @@
 #include <linux/platform_device.h>
 #include <linux/phy/phy.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <linux/reset.h>
 
 #include <linux/usb/of.h>
 
@@ -529,6 +530,18 @@ static int dwc2_driver_probe(struct platform_device *dev)
 	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
 		(unsigned long)res->start, hsotg->regs);
 
+	hsotg->need_phy_full_reset_on_wake =
+		of_property_read_bool(dev->dev.of_node,
+				"snps,need-phy-full-reset-on-wake");
+	hsotg->phy_full_reset = devm_reset_control_get(hsotg->dev,
+				"phy-full-reset");
+	if (IS_ERR(hsotg->phy_full_reset) &&
+			hsotg->need_phy_full_reset_on_wake) {
+		dev_warn(hsotg->dev, "Missing phy full reset (%ld); skipping\n",
+				PTR_ERR(hsotg->phy_full_reset));
+		hsotg->need_phy_full_reset_on_wake = false;
+	}
+
 	retval = dwc2_lowlevel_hw_init(hsotg);
 	if (retval)
 		return retval;
-- 
2.7.4


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Re: [PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Rob Herring]

On Tue, Jul 19, 2016 at 08:05:33PM +0800, Randy Li wrote:
> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> 
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend). The problem is caused by a design fault in IC, Rockchip
> have confirmed it and fix this problem in the future IC model.
> 
> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
> 
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit), which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).
> 
> It's unfortunate that we need to do a full re-enumeration of devices at
> wakeup time, but this is better than alternative of letting the bus get
> wedged.
> 
> Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
>  drivers/usb/dwc2/core.h                        |  5 +++++
>  drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
>  drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
>  4 files changed, 39 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
> index 20a68bf..40c63ae 100644
> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
> @@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
>  Optional properties:
>  - phys: phy provider specifier
>  - phy-names: shall be "usb2-phy"
> +- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset

Bikeshedding, but 'snps,full-phy-reset-on-wake' is slightly shorter.

However, this isn't really even needed. It should be implied by the SoC 
specific compatible string.

> +  the PHY when we detect a wakeup due to a hardware errata.  If present you
> +  must specify a "phy-full-reset" reset.
> +
> +Resets:
> +- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).

This property belows in the phy node as that is where the reset is 
attached to and why is it not using the standard binding "resets"?

Rob
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Re: [PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Randy Li]

Thank you for reviewing, if you agree with my opinion, I would implement 
a new version as soon as  possible.


On 07/20/2016 09:36 AM, Rob Herring wrote:
> On Tue, Jul 19, 2016 at 08:05:33PM +0800, Randy Li wrote:
>> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>>
>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>> port) the PHY can get into a bad state when a wakeup is asserted (not
>> just a wakeup from full system suspend but also a wakeup from
>> autosuspend). The problem is caused by a design fault in IC, Rockchip
>> have confirmed it and fix this problem in the future IC model.
>>
>> We can get the PHY out of its bad state by asserting its "port reset",
>> but unfortunately that seems to assert a reset onto the USB bus so it
>> could confuse things if we don't actually deenumerate / reenumerate the
>> device.
>>
>> We can also get the PHY out of its bad state by fully resetting it using
>> the reset from the CRU (clock reset unit), which does a more full
>> reset.  The CRU-based reset appears to actually cause devices on the bus
>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>> way).
>>
>> It's unfortunate that we need to do a full re-enumeration of devices at
>> wakeup time, but this is better than alternative of letting the bus get
>> wedged.
>>
>> Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> ---
>>   Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
>>   drivers/usb/dwc2/core.h                        |  5 +++++
>>   drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
>>   drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
>>   4 files changed, 39 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
>> index 20a68bf..40c63ae 100644
>> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
>> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
>> @@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
>>   Optional properties:
>>   - phys: phy provider specifier
>>   - phy-names: shall be "usb2-phy"
>> +- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
> Bikeshedding, but 'snps,full-phy-reset-on-wake' is slightly shorter.
>
> However, this isn't really even needed. It should be implied by the SoC
> specific compatible string.
I would.
>
>> +  the PHY when we detect a wakeup due to a hardware errata.  If present you
>> +  must specify a "phy-full-reset" reset.
>> +
>> +Resets:
>> +- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).
> This property belows in the phy node as that is where the reset is
> attached to and why is it not using the standard binding "resets"?
Because the struct phy_ops doesn't have something like reset method. It 
is impossible to make a phy reset now. Also maybe it is not need to 
define a reset at dts, just implied do that reset that in code(as the 
way to reset is always same and only used by rk3288).
>
> Rob
>

-- 
Randy Li
The third produce department


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Re: [PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Rob Herring]

On Wed, Jul 20, 2016 at 10:54:33AM +0800, Randy Li wrote:
> Thank you for reviewing, if you agree with my opinion, I would implement a
> new version as soon as  possible.
> 
> 
> On 07/20/2016 09:36 AM, Rob Herring wrote:
> >On Tue, Jul 19, 2016 at 08:05:33PM +0800, Randy Li wrote:
> >>From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> >>
> >>On the rk3288 USB host-only port (the one that's not the OTG-enabled
> >>port) the PHY can get into a bad state when a wakeup is asserted (not
> >>just a wakeup from full system suspend but also a wakeup from
> >>autosuspend). The problem is caused by a design fault in IC, Rockchip
> >>have confirmed it and fix this problem in the future IC model.
> >>
> >>We can get the PHY out of its bad state by asserting its "port reset",
> >>but unfortunately that seems to assert a reset onto the USB bus so it
> >>could confuse things if we don't actually deenumerate / reenumerate the
> >>device.
> >>
> >>We can also get the PHY out of its bad state by fully resetting it using
> >>the reset from the CRU (clock reset unit), which does a more full
> >>reset.  The CRU-based reset appears to actually cause devices on the bus
> >>to be removed and reinserted, which fixes the problem (albeit in a hacky
> >>way).
> >>
> >>It's unfortunate that we need to do a full re-enumeration of devices at
> >>wakeup time, but this is better than alternative of letting the bus get
> >>wedged.
> >>
> >>Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> >>Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> >>Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> >>---
> >>  Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
> >>  drivers/usb/dwc2/core.h                        |  5 +++++
> >>  drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
> >>  drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
> >>  4 files changed, 39 insertions(+)
> >>
> >>diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
> >>index 20a68bf..40c63ae 100644
> >>--- a/Documentation/devicetree/bindings/usb/dwc2.txt
> >>+++ b/Documentation/devicetree/bindings/usb/dwc2.txt
> >>@@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
> >>  Optional properties:
> >>  - phys: phy provider specifier
> >>  - phy-names: shall be "usb2-phy"
> >>+- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
> >Bikeshedding, but 'snps,full-phy-reset-on-wake' is slightly shorter.
> >
> >However, this isn't really even needed. It should be implied by the SoC
> >specific compatible string.
> I would.
> >
> >>+  the PHY when we detect a wakeup due to a hardware errata.  If present you
> >>+  must specify a "phy-full-reset" reset.
> >>+
> >>+Resets:
> >>+- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).
> >This property belows in the phy node as that is where the reset is
> >attached to and why is it not using the standard binding "resets"?
> Because the struct phy_ops doesn't have something like reset method. It is
> impossible to make a phy reset now. Also maybe it is not need to define a
> reset at dts, just implied do that reset that in code(as the way to reset is
> always same and only used by rk3288).

Either the controller can retrieve the phy reset from the phy node or 
add a reset fn to struct phy_ops. The latter would be cleaner.

If you don't put in DT at all and hard code in the driver, then I don't 
have an opinion.

Rob
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Re: [PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[John Youn]

On 7/19/2016 5:06 AM, Randy Li wrote:
> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> 
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend). The problem is caused by a design fault in IC, Rockchip
> have confirmed it and fix this problem in the future IC model.
> 
> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
> 
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit), which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).
> 
> It's unfortunate that we need to do a full re-enumeration of devices at
> wakeup time, but this is better than alternative of letting the bus get
> wedged.
> 
> Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
> ---
>  Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
>  drivers/usb/dwc2/core.h                        |  5 +++++
>  drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
>  drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
>  4 files changed, 39 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
> index 20a68bf..40c63ae 100644
> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
> @@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
>  Optional properties:
>  - phys: phy provider specifier
>  - phy-names: shall be "usb2-phy"
> +- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
> +  the PHY when we detect a wakeup due to a hardware errata.  If present you
> +  must specify a "phy-full-reset" reset.
> +
> +Resets:
> +- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).
> +
>  Refer to phy/phy-bindings.txt for generic phy consumer properties
>  - dr_mode: shall be one of "host", "peripheral" and "otg"
>    Refer to usb/generic.txt
> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
> index dec0b21..951abe0 100644
> --- a/drivers/usb/dwc2/core.h
> +++ b/drivers/usb/dwc2/core.h
> @@ -719,8 +719,11 @@ struct dwc2_hregs_backup {
>   * @hcd_enabled		Host mode sub-driver initialization indicator.
>   * @gadget_enabled	Peripheral mode sub-driver initialization indicator.
>   * @ll_hw_enabled	Status of low-level hardware resources.
> + * @need_phy_full_reset_on_wake: Quirk saying that we should assert
> + *                               phy_full_reset on a remote wakeup.
>   * @phy:                The otg phy transceiver structure for phy control.
>   * @uphy:               The otg phy transceiver structure for old USB phy control.
> + * @phy_full_reset:     Reset control for the PHY's "full reset".
>   * @plat:               The platform specific configuration data. This can be removed once
>   *                      all SoCs support usb transceiver.
>   * @supplies:           Definition of USB power supplies
> @@ -853,9 +856,11 @@ struct dwc2_hsotg {
>  	unsigned int hcd_enabled:1;
>  	unsigned int gadget_enabled:1;
>  	unsigned int ll_hw_enabled:1;
> +	unsigned int need_phy_full_reset_on_wake:1;
>  
>  	struct phy *phy;
>  	struct usb_phy *uphy;
> +	struct reset_control *phy_full_reset;
>  	struct dwc2_hsotg_plat *plat;
>  	struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)];
>  	u32 phyif;
> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
> index d85c5c9..53d8327 100644
> --- a/drivers/usb/dwc2/core_intr.c
> +++ b/drivers/usb/dwc2/core_intr.c
> @@ -45,6 +45,7 @@
>  #include <linux/dma-mapping.h>
>  #include <linux/io.h>
>  #include <linux/slab.h>
> +#include <linux/reset.h>
>  #include <linux/usb.h>
>  
>  #include <linux/usb/hcd.h>
> @@ -379,6 +380,19 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>  			/* Restart the Phy Clock */
>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
> +
> +			/*
> +			 * If we've got this quirk then the PHY is stuck upon
> +			 * wakeup.  Assert reset.  This will propagate out and
> +			 * eventually we'll re-enumerate the device.  Not great
> +			 * but the best we can do.
> +			 */
> +			if (hsotg->need_phy_full_reset_on_wake) {
> +				reset_control_assert(hsotg->phy_full_reset);
> +				udelay(50);
> +				reset_control_deassert(hsotg->phy_full_reset);
> +			}
> +
>  			mod_timer(&hsotg->wkp_timer,
>  				  jiffies + msecs_to_jiffies(71));
>  		} else {
> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
> index fc6f525..d8894a1 100644
> --- a/drivers/usb/dwc2/platform.c
> +++ b/drivers/usb/dwc2/platform.c
> @@ -45,6 +45,7 @@
>  #include <linux/platform_device.h>
>  #include <linux/phy/phy.h>
>  #include <linux/platform_data/s3c-hsotg.h>
> +#include <linux/reset.h>
>  
>  #include <linux/usb/of.h>
>  
> @@ -529,6 +530,18 @@ static int dwc2_driver_probe(struct platform_device *dev)
>  	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
>  		(unsigned long)res->start, hsotg->regs);
>  
> +	hsotg->need_phy_full_reset_on_wake =
> +		of_property_read_bool(dev->dev.of_node,
> +				"snps,need-phy-full-reset-on-wake");
> +	hsotg->phy_full_reset = devm_reset_control_get(hsotg->dev,
> +				"phy-full-reset");
> +	if (IS_ERR(hsotg->phy_full_reset) &&
> +			hsotg->need_phy_full_reset_on_wake) {

Should use the devm_reset_control_get_optional() variant so that we
can check whether it is a legitimate error, or the PHY is not
specified or !CONFIG_OF.

> +		dev_warn(hsotg->dev, "Missing phy full reset (%ld); skipping\n",
> +				PTR_ERR(hsotg->phy_full_reset));
> +		hsotg->need_phy_full_reset_on_wake = false;
> +	}
> +

Also this code can go into the dwc2_lowlevel_hw_init() function so as
not to clutter up the probe() function futher.

A similar patch adding a reset was submitted by Dinh which you can use
as a reference:

http://marc.info/?l=linux-usb&m=147085447403019&w=2

Regards,
John
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Re: [PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[Randy Li]

On 08/16/2016 06:19 AM, John Youn wrote:
> On 7/19/2016 5:06 AM, Randy Li wrote:
>> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>>
>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>> port) the PHY can get into a bad state when a wakeup is asserted (not
>> just a wakeup from full system suspend but also a wakeup from
>> autosuspend). The problem is caused by a design fault in IC, Rockchip
>> have confirmed it and fix this problem in the future IC model.
>>
>> We can get the PHY out of its bad state by asserting its "port reset",
>> but unfortunately that seems to assert a reset onto the USB bus so it
>> could confuse things if we don't actually deenumerate / reenumerate the
>> device.
>>
>> We can also get the PHY out of its bad state by fully resetting it using
>> the reset from the CRU (clock reset unit), which does a more full
>> reset.  The CRU-based reset appears to actually cause devices on the bus
>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>> way).
>>
>> It's unfortunate that we need to do a full re-enumeration of devices at
>> wakeup time, but this is better than alternative of letting the bus get
>> wedged.
>>
>> Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>> ---
>>  Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
>>  drivers/usb/dwc2/core.h                        |  5 +++++
>>  drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
>>  drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
>>  4 files changed, 39 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
>> index 20a68bf..40c63ae 100644
>> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
>> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
>> @@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
>>  Optional properties:
>>  - phys: phy provider specifier
>>  - phy-names: shall be "usb2-phy"
>> +- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
>> +  the PHY when we detect a wakeup due to a hardware errata.  If present you
>> +  must specify a "phy-full-reset" reset.
>> +
>> +Resets:
>> +- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).
>> +
>>  Refer to phy/phy-bindings.txt for generic phy consumer properties
>>  - dr_mode: shall be one of "host", "peripheral" and "otg"
>>    Refer to usb/generic.txt
>> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
>> index dec0b21..951abe0 100644
>> --- a/drivers/usb/dwc2/core.h
>> +++ b/drivers/usb/dwc2/core.h
>> @@ -719,8 +719,11 @@ struct dwc2_hregs_backup {
>>   * @hcd_enabled		Host mode sub-driver initialization indicator.
>>   * @gadget_enabled	Peripheral mode sub-driver initialization indicator.
>>   * @ll_hw_enabled	Status of low-level hardware resources.
>> + * @need_phy_full_reset_on_wake: Quirk saying that we should assert
>> + *                               phy_full_reset on a remote wakeup.
>>   * @phy:                The otg phy transceiver structure for phy control.
>>   * @uphy:               The otg phy transceiver structure for old USB phy control.
>> + * @phy_full_reset:     Reset control for the PHY's "full reset".
>>   * @plat:               The platform specific configuration data. This can be removed once
>>   *                      all SoCs support usb transceiver.
>>   * @supplies:           Definition of USB power supplies
>> @@ -853,9 +856,11 @@ struct dwc2_hsotg {
>>  	unsigned int hcd_enabled:1;
>>  	unsigned int gadget_enabled:1;
>>  	unsigned int ll_hw_enabled:1;
>> +	unsigned int need_phy_full_reset_on_wake:1;
>>
>>  	struct phy *phy;
>>  	struct usb_phy *uphy;
>> +	struct reset_control *phy_full_reset;
>>  	struct dwc2_hsotg_plat *plat;
>>  	struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)];
>>  	u32 phyif;
>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>> index d85c5c9..53d8327 100644
>> --- a/drivers/usb/dwc2/core_intr.c
>> +++ b/drivers/usb/dwc2/core_intr.c
>> @@ -45,6 +45,7 @@
>>  #include <linux/dma-mapping.h>
>>  #include <linux/io.h>
>>  #include <linux/slab.h>
>> +#include <linux/reset.h>
>>  #include <linux/usb.h>
>>
>>  #include <linux/usb/hcd.h>
>> @@ -379,6 +380,19 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>  			/* Restart the Phy Clock */
>>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>> +
>> +			/*
>> +			 * If we've got this quirk then the PHY is stuck upon
>> +			 * wakeup.  Assert reset.  This will propagate out and
>> +			 * eventually we'll re-enumerate the device.  Not great
>> +			 * but the best we can do.
>> +			 */
>> +			if (hsotg->need_phy_full_reset_on_wake) {
>> +				reset_control_assert(hsotg->phy_full_reset);
>> +				udelay(50);
>> +				reset_control_deassert(hsotg->phy_full_reset);
>> +			}
>> +
>>  			mod_timer(&hsotg->wkp_timer,
>>  				  jiffies + msecs_to_jiffies(71));
>>  		} else {
>> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
>> index fc6f525..d8894a1 100644
>> --- a/drivers/usb/dwc2/platform.c
>> +++ b/drivers/usb/dwc2/platform.c
>> @@ -45,6 +45,7 @@
>>  #include <linux/platform_device.h>
>>  #include <linux/phy/phy.h>
>>  #include <linux/platform_data/s3c-hsotg.h>
>> +#include <linux/reset.h>
>>
>>  #include <linux/usb/of.h>
>>
>> @@ -529,6 +530,18 @@ static int dwc2_driver_probe(struct platform_device *dev)
>>  	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
>>  		(unsigned long)res->start, hsotg->regs);
>>
>> +	hsotg->need_phy_full_reset_on_wake =
>> +		of_property_read_bool(dev->dev.of_node,
>> +				"snps,need-phy-full-reset-on-wake");
>> +	hsotg->phy_full_reset = devm_reset_control_get(hsotg->dev,
>> +				"phy-full-reset");
>> +	if (IS_ERR(hsotg->phy_full_reset) &&
>> +			hsotg->need_phy_full_reset_on_wake) {
>
> Should use the devm_reset_control_get_optional() variant so that we
> can check whether it is a legitimate error, or the PHY is not
> specified or !CONFIG_OF.
I see.
>
>> +		dev_warn(hsotg->dev, "Missing phy full reset (%ld); skipping\n",
>> +				PTR_ERR(hsotg->phy_full_reset));
>> +		hsotg->need_phy_full_reset_on_wake = false;
>> +	}
>> +
>
> Also this code can go into the dwc2_lowlevel_hw_init() function so as
> not to clutter up the probe() function futher.
>
> A similar patch adding a reset was submitted by Dinh which you can use
> as a reference:
>
> http://marc.info/?l=linux-usb&m=147085447403019&w=2

I am a little busy recently, but I would submit a new version in this week.
>
> Regards,
> John
>

-- 
Randy Li
The third produce department

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Re: [PATCH 1/2] usb: dwc2: optionally assert phy "full reset" when waking up

[John Youn]

On 8/15/2016 6:11 PM, Randy Li wrote:
> 
> 
> On 08/16/2016 06:19 AM, John Youn wrote:
>> On 7/19/2016 5:06 AM, Randy Li wrote:
>>> From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>>>
>>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>>> port) the PHY can get into a bad state when a wakeup is asserted (not
>>> just a wakeup from full system suspend but also a wakeup from
>>> autosuspend). The problem is caused by a design fault in IC, Rockchip
>>> have confirmed it and fix this problem in the future IC model.
>>>
>>> We can get the PHY out of its bad state by asserting its "port reset",
>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>> could confuse things if we don't actually deenumerate / reenumerate the
>>> device.
>>>
>>> We can also get the PHY out of its bad state by fully resetting it using
>>> the reset from the CRU (clock reset unit), which does a more full
>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>> way).
>>>
>>> It's unfortunate that we need to do a full re-enumeration of devices at
>>> wakeup time, but this is better than alternative of letting the bus get
>>> wedged.
>>>
>>> Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>>> Signed-off-by: Yunzhi Li <lyz-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>> Reviewed-by: Randy Li <randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
>>> ---
>>>  Documentation/devicetree/bindings/usb/dwc2.txt |  7 +++++++
>>>  drivers/usb/dwc2/core.h                        |  5 +++++
>>>  drivers/usb/dwc2/core_intr.c                   | 14 ++++++++++++++
>>>  drivers/usb/dwc2/platform.c                    | 13 +++++++++++++
>>>  4 files changed, 39 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt
>>> index 20a68bf..40c63ae 100644
>>> --- a/Documentation/devicetree/bindings/usb/dwc2.txt
>>> +++ b/Documentation/devicetree/bindings/usb/dwc2.txt
>>> @@ -20,6 +20,13 @@ Refer to clk/clock-bindings.txt for generic clock consumer properties
>>>  Optional properties:
>>>  - phys: phy provider specifier
>>>  - phy-names: shall be "usb2-phy"
>>> +- snps,need-phy-full-reset-on-wake: if present indicates that we need to reset
>>> +  the PHY when we detect a wakeup due to a hardware errata.  If present you
>>> +  must specify a "phy-full-reset" reset.
>>> +
>>> +Resets:
>>> +- phy-full-reset (optional): Fully resets the PHY (Only used by rk3288 Soc).
>>> +
>>>  Refer to phy/phy-bindings.txt for generic phy consumer properties
>>>  - dr_mode: shall be one of "host", "peripheral" and "otg"
>>>    Refer to usb/generic.txt
>>> diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
>>> index dec0b21..951abe0 100644
>>> --- a/drivers/usb/dwc2/core.h
>>> +++ b/drivers/usb/dwc2/core.h
>>> @@ -719,8 +719,11 @@ struct dwc2_hregs_backup {
>>>   * @hcd_enabled		Host mode sub-driver initialization indicator.
>>>   * @gadget_enabled	Peripheral mode sub-driver initialization indicator.
>>>   * @ll_hw_enabled	Status of low-level hardware resources.
>>> + * @need_phy_full_reset_on_wake: Quirk saying that we should assert
>>> + *                               phy_full_reset on a remote wakeup.
>>>   * @phy:                The otg phy transceiver structure for phy control.
>>>   * @uphy:               The otg phy transceiver structure for old USB phy control.
>>> + * @phy_full_reset:     Reset control for the PHY's "full reset".
>>>   * @plat:               The platform specific configuration data. This can be removed once
>>>   *                      all SoCs support usb transceiver.
>>>   * @supplies:           Definition of USB power supplies
>>> @@ -853,9 +856,11 @@ struct dwc2_hsotg {
>>>  	unsigned int hcd_enabled:1;
>>>  	unsigned int gadget_enabled:1;
>>>  	unsigned int ll_hw_enabled:1;
>>> +	unsigned int need_phy_full_reset_on_wake:1;
>>>
>>>  	struct phy *phy;
>>>  	struct usb_phy *uphy;
>>> +	struct reset_control *phy_full_reset;
>>>  	struct dwc2_hsotg_plat *plat;
>>>  	struct regulator_bulk_data supplies[ARRAY_SIZE(dwc2_hsotg_supply_names)];
>>>  	u32 phyif;
>>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>>> index d85c5c9..53d8327 100644
>>> --- a/drivers/usb/dwc2/core_intr.c
>>> +++ b/drivers/usb/dwc2/core_intr.c
>>> @@ -45,6 +45,7 @@
>>>  #include <linux/dma-mapping.h>
>>>  #include <linux/io.h>
>>>  #include <linux/slab.h>
>>> +#include <linux/reset.h>
>>>  #include <linux/usb.h>
>>>
>>>  #include <linux/usb/hcd.h>
>>> @@ -379,6 +380,19 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>>  			/* Restart the Phy Clock */
>>>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>>>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>>> +
>>> +			/*
>>> +			 * If we've got this quirk then the PHY is stuck upon
>>> +			 * wakeup.  Assert reset.  This will propagate out and
>>> +			 * eventually we'll re-enumerate the device.  Not great
>>> +			 * but the best we can do.
>>> +			 */
>>> +			if (hsotg->need_phy_full_reset_on_wake) {
>>> +				reset_control_assert(hsotg->phy_full_reset);
>>> +				udelay(50);
>>> +				reset_control_deassert(hsotg->phy_full_reset);
>>> +			}
>>> +
>>>  			mod_timer(&hsotg->wkp_timer,
>>>  				  jiffies + msecs_to_jiffies(71));
>>>  		} else {
>>> diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
>>> index fc6f525..d8894a1 100644
>>> --- a/drivers/usb/dwc2/platform.c
>>> +++ b/drivers/usb/dwc2/platform.c
>>> @@ -45,6 +45,7 @@
>>>  #include <linux/platform_device.h>
>>>  #include <linux/phy/phy.h>
>>>  #include <linux/platform_data/s3c-hsotg.h>
>>> +#include <linux/reset.h>
>>>
>>>  #include <linux/usb/of.h>
>>>
>>> @@ -529,6 +530,18 @@ static int dwc2_driver_probe(struct platform_device *dev)
>>>  	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
>>>  		(unsigned long)res->start, hsotg->regs);
>>>
>>> +	hsotg->need_phy_full_reset_on_wake =
>>> +		of_property_read_bool(dev->dev.of_node,
>>> +				"snps,need-phy-full-reset-on-wake");
>>> +	hsotg->phy_full_reset = devm_reset_control_get(hsotg->dev,
>>> +				"phy-full-reset");
>>> +	if (IS_ERR(hsotg->phy_full_reset) &&
>>> +			hsotg->need_phy_full_reset_on_wake) {
>>
>> Should use the devm_reset_control_get_optional() variant so that we
>> can check whether it is a legitimate error, or the PHY is not
>> specified or !CONFIG_OF.
> I see.

Just a correction, I meant in case the reset controller is unspecified
or !CONFIG_RESET_CONTROLLER.

>>
>>> +		dev_warn(hsotg->dev, "Missing phy full reset (%ld); skipping\n",
>>> +				PTR_ERR(hsotg->phy_full_reset));
>>> +		hsotg->need_phy_full_reset_on_wake = false;
>>> +	}
>>> +
>>
>> Also this code can go into the dwc2_lowlevel_hw_init() function so as
>> not to clutter up the probe() function futher.
>>
>> A similar patch adding a reset was submitted by Dinh which you can use
>> as a reference:
>>
>> http://marc.info/?l=linux-usb&m=147085447403019&w=2
> 
> I am a little busy recently, but I would submit a new version in this week.

Ok sure.

Regards,
John
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[PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32

[Randy Li]

Hello All:
 This version would move reset into phy. I wanted to implement a hard
code version but I meet some problem with ioremap reset controller,
in order to keep my word, I offer this version this time.

Randy Li (4):
  phy: Add reset callback
  phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during
    wakeup
  usb: dwc2: assert phy reset when waking up in rk3288 platform
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 arch/arm/boot/dts/rk3288.dtsi  |  5 +++++
 drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
 drivers/usb/dwc2/core_intr.c   |  9 +++++++++
 include/linux/phy/phy.h        |  2 ++
 4 files changed, 36 insertions(+)

-- 
2.7.4

[PATCH 0/4 v4] usb: dwc2: fix the usb host for host port at RK32

[Randy Li]

Hello All:
 This version would move reset into phy. I wanted to implement a hard
code version but I meet some problem with ioremap reset controller,
in order to keep my word, I offer this version this time.

Randy Li (4):
  phy: Add reset callback
  phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during
    wakeup
  usb: dwc2: assert phy reset when waking up in rk3288 platform
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 arch/arm/boot/dts/rk3288.dtsi  |  5 +++++
 drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
 drivers/usb/dwc2/core_intr.c   |  9 +++++++++
 include/linux/phy/phy.h        |  2 ++
 4 files changed, 36 insertions(+)

-- 
2.7.4

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[PATCH 1/4] phy: Add reset callback

[Randy Li]

The only use for this is for solving a hardware design problem in
usb of Rockchip RK3288.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 include/linux/phy/phy.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index f08b672..4d34607 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -36,6 +36,7 @@ enum phy_mode {
  * @power_on: powering on the phy
  * @power_off: powering off the phy
  * @set_mode: set the mode of the phy
+ * @reset: reseting the phy
  * @owner: the module owner containing the ops
  */
 struct phy_ops {
@@ -44,6 +45,7 @@ struct phy_ops {
 	int	(*power_on)(struct phy *phy);
 	int	(*power_off)(struct phy *phy);
 	int	(*set_mode)(struct phy *phy, enum phy_mode mode);
+	int	(*reset)(struct phy *phy);
 	struct module *owner;
 };
 
-- 
2.7.4

[PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Randy Li]

It is a hardware bug in RK3288, the only way to solve it is to
reset the phy.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
index 2a7381f..734987f 100644
--- a/drivers/phy/phy-rockchip-usb.c
+++ b/drivers/phy/phy-rockchip-usb.c
@@ -29,6 +29,7 @@
 #include <linux/reset.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <linux/delay.h>
 
 static int enable_usb_uart;
 
@@ -64,6 +65,7 @@ struct rockchip_usb_phy {
 	struct clk_hw	clk480m_hw;
 	struct phy	*phy;
 	bool		uart_enabled;
+	struct reset_control *reset;
 };
 
 static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
@@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
 	return clk_prepare_enable(phy->clk480m);
 }
 
+static int rockchip_usb_phy_reset(struct phy *_phy)
+{
+	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
+
+	if (phy->reset) {
+		reset_control_assert(phy->reset);
+		udelay(10);
+		reset_control_deassert(phy->reset);
+	}
+
+	return 0;
+}
+
 static const struct phy_ops ops = {
 	.power_on	= rockchip_usb_phy_power_on,
 	.power_off	= rockchip_usb_phy_power_off,
+	.reset		= rockchip_usb_phy_reset,
 	.owner		= THIS_MODULE,
 };
 
@@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base,
 		return -EINVAL;
 	}
 
+	rk_phy->reset = of_reset_control_get(child, "phy-reset");
+	if (IS_ERR(rk_phy->reset))
+		rk_phy->reset = NULL;
+
 	rk_phy->reg_offset = reg_offset;
 
 	rk_phy->clk = of_clk_get_by_name(child, "phyclk");
-- 
2.7.4

[PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Randy Li]

It is a hardware bug in RK3288, the only way to solve it is to
reset the phy.

Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
---
 drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
index 2a7381f..734987f 100644
--- a/drivers/phy/phy-rockchip-usb.c
+++ b/drivers/phy/phy-rockchip-usb.c
@@ -29,6 +29,7 @@
 #include <linux/reset.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <linux/delay.h>
 
 static int enable_usb_uart;
 
@@ -64,6 +65,7 @@ struct rockchip_usb_phy {
 	struct clk_hw	clk480m_hw;
 	struct phy	*phy;
 	bool		uart_enabled;
+	struct reset_control *reset;
 };
 
 static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
@@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
 	return clk_prepare_enable(phy->clk480m);
 }
 
+static int rockchip_usb_phy_reset(struct phy *_phy)
+{
+	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
+
+	if (phy->reset) {
+		reset_control_assert(phy->reset);
+		udelay(10);
+		reset_control_deassert(phy->reset);
+	}
+
+	return 0;
+}
+
 static const struct phy_ops ops = {
 	.power_on	= rockchip_usb_phy_power_on,
 	.power_off	= rockchip_usb_phy_power_off,
+	.reset		= rockchip_usb_phy_reset,
 	.owner		= THIS_MODULE,
 };
 
@@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base,
 		return -EINVAL;
 	}
 
+	rk_phy->reset = of_reset_control_get(child, "phy-reset");
+	if (IS_ERR(rk_phy->reset))
+		rk_phy->reset = NULL;
+
 	rk_phy->reg_offset = reg_offset;
 
 	rk_phy->clk = of_clk_get_by_name(child, "phyclk");
-- 
2.7.4

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Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Kishon Vijay Abraham I]

Hi,

On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
> It is a hardware bug in RK3288, the only way to solve it is to
> reset the phy.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
> index 2a7381f..734987f 100644
> --- a/drivers/phy/phy-rockchip-usb.c
> +++ b/drivers/phy/phy-rockchip-usb.c
> @@ -29,6 +29,7 @@
>  #include <linux/reset.h>
>  #include <linux/regmap.h>
>  #include <linux/mfd/syscon.h>
> +#include <linux/delay.h>
>  
>  static int enable_usb_uart;
>  
> @@ -64,6 +65,7 @@ struct rockchip_usb_phy {
>  	struct clk_hw	clk480m_hw;
>  	struct phy	*phy;
>  	bool		uart_enabled;
> +	struct reset_control *reset;
>  };
>  
>  static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
> @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
>  	return clk_prepare_enable(phy->clk480m);
>  }
>  
> +static int rockchip_usb_phy_reset(struct phy *_phy)
> +{
> +	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +	if (phy->reset) {
> +		reset_control_assert(phy->reset);
> +		udelay(10);
> +		reset_control_deassert(phy->reset);
> +	}
> +
> +	return 0;
> +}
> +
>  static const struct phy_ops ops = {
>  	.power_on	= rockchip_usb_phy_power_on,
>  	.power_off	= rockchip_usb_phy_power_off,
> +	.reset		= rockchip_usb_phy_reset,

why not just reuse the .init ops? reset can be done during initialization right?

Thanks
Kishon

Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Kishon Vijay Abraham I]

Hi,

On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
> It is a hardware bug in RK3288, the only way to solve it is to
> reset the phy.
> 
> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
> ---
>  drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
> index 2a7381f..734987f 100644
> --- a/drivers/phy/phy-rockchip-usb.c
> +++ b/drivers/phy/phy-rockchip-usb.c
> @@ -29,6 +29,7 @@
>  #include <linux/reset.h>
>  #include <linux/regmap.h>
>  #include <linux/mfd/syscon.h>
> +#include <linux/delay.h>
>  
>  static int enable_usb_uart;
>  
> @@ -64,6 +65,7 @@ struct rockchip_usb_phy {
>  	struct clk_hw	clk480m_hw;
>  	struct phy	*phy;
>  	bool		uart_enabled;
> +	struct reset_control *reset;
>  };
>  
>  static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
> @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
>  	return clk_prepare_enable(phy->clk480m);
>  }
>  
> +static int rockchip_usb_phy_reset(struct phy *_phy)
> +{
> +	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
> +
> +	if (phy->reset) {
> +		reset_control_assert(phy->reset);
> +		udelay(10);
> +		reset_control_deassert(phy->reset);
> +	}
> +
> +	return 0;
> +}
> +
>  static const struct phy_ops ops = {
>  	.power_on	= rockchip_usb_phy_power_on,
>  	.power_off	= rockchip_usb_phy_power_off,
> +	.reset		= rockchip_usb_phy_reset,

why not just reuse the .init ops? reset can be done during initialization right?

Thanks
Kishon
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Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Heiko Stübner]

Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I:
> Hi,
> 
> On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
> > It is a hardware bug in RK3288, the only way to solve it is to
> > reset the phy.
> > 
> > Signed-off-by: Randy Li <ayaka@soulik.info>
> > ---
> > 
> >  drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> > 
> > diff --git a/drivers/phy/phy-rockchip-usb.c
> > b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644
> > --- a/drivers/phy/phy-rockchip-usb.c
> > +++ b/drivers/phy/phy-rockchip-usb.c
> > @@ -29,6 +29,7 @@
> > 
> >  #include <linux/reset.h>
> >  #include <linux/regmap.h>
> >  #include <linux/mfd/syscon.h>
> > 
> > +#include <linux/delay.h>
> > 
> >  static int enable_usb_uart;
> > 
> > @@ -64,6 +65,7 @@ struct rockchip_usb_phy {
> > 
> >  	struct clk_hw	clk480m_hw;
> >  	struct phy	*phy;
> >  	bool		uart_enabled;
> > 
> > +	struct reset_control *reset;
> > 
> >  };
> >  
> >  static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
> > 
> > @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy
> > *_phy)
> > 
> >  	return clk_prepare_enable(phy->clk480m);
> >  
> >  }
> > 
> > +static int rockchip_usb_phy_reset(struct phy *_phy)
> > +{
> > +	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
> > +
> > +	if (phy->reset) {
> > +		reset_control_assert(phy->reset);
> > +		udelay(10);
> > +		reset_control_deassert(phy->reset);
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > 
> >  static const struct phy_ops ops = {
> >  
> >  	.power_on	= rockchip_usb_phy_power_on,
> >  	.power_off	= rockchip_usb_phy_power_off,
> > 
> > +	.reset		= rockchip_usb_phy_reset,
> 
> why not just reuse the .init ops? reset can be done during initialization
> right?

The naming of power_on + power_off and init + exit probably suggests that they 
are supposed to be used in pairs. (aka module_init + module_exit and probably 
more)

But in fact I've seen different combinations so far (phy_init + phy_power_on 
... phy_power_off + phy_exit but also phy_power_on + phy_init ... phy_exit + 
phy_power_off), so I guess the semantics are not that strictly defined.

Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Kishon Vijay Abraham I]

Hi,

On Monday 22 August 2016 06:30 PM, Heiko Stübner wrote:
> Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I:
>> Hi,
>>
>> On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
>>> It is a hardware bug in RK3288, the only way to solve it is to
>>> reset the phy.
>>>
>>> Signed-off-by: Randy Li <ayaka@soulik.info>
>>> ---
>>>
>>>  drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
>>>  1 file changed, 20 insertions(+)
>>>
>>> diff --git a/drivers/phy/phy-rockchip-usb.c
>>> b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644
>>> --- a/drivers/phy/phy-rockchip-usb.c
>>> +++ b/drivers/phy/phy-rockchip-usb.c
>>> @@ -29,6 +29,7 @@
>>>
>>>  #include <linux/reset.h>
>>>  #include <linux/regmap.h>
>>>  #include <linux/mfd/syscon.h>
>>>
>>> +#include <linux/delay.h>
>>>
>>>  static int enable_usb_uart;
>>>
>>> @@ -64,6 +65,7 @@ struct rockchip_usb_phy {
>>>
>>>  	struct clk_hw	clk480m_hw;
>>>  	struct phy	*phy;
>>>  	bool		uart_enabled;
>>>
>>> +	struct reset_control *reset;
>>>
>>>  };
>>>  
>>>  static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
>>>
>>> @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy
>>> *_phy)
>>>
>>>  	return clk_prepare_enable(phy->clk480m);
>>>  
>>>  }
>>>
>>> +static int rockchip_usb_phy_reset(struct phy *_phy)
>>> +{
>>> +	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
>>> +
>>> +	if (phy->reset) {
>>> +		reset_control_assert(phy->reset);
>>> +		udelay(10);
>>> +		reset_control_deassert(phy->reset);
>>> +	}
>>> +
>>> +	return 0;
>>> +}
>>> +
>>>
>>>  static const struct phy_ops ops = {
>>>  
>>>  	.power_on	= rockchip_usb_phy_power_on,
>>>  	.power_off	= rockchip_usb_phy_power_off,
>>>
>>> +	.reset		= rockchip_usb_phy_reset,
>>
>> why not just reuse the .init ops? reset can be done during initialization
>> right?
> 
> The naming of power_on + power_off and init + exit probably suggests that they 
> are supposed to be used in pairs. (aka module_init + module_exit and probably 
> more)
> 
> But in fact I've seen different combinations so far (phy_init + phy_power_on 
> ... phy_power_off + phy_exit but also phy_power_on + phy_init ... phy_exit + 
> phy_power_off), so I guess the semantics are not that strictly defined.

yeah, it got difficult to maintain the semantics once the number of phy users
increased. Thought it was better than bloating the framework with platform
specific callbacks.

Thanks
Kishon

Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Kishon Vijay Abraham I]

Hi,

On Monday 22 August 2016 06:30 PM, Heiko Stübner wrote:
> Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I:
>> Hi,
>>
>> On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
>>> It is a hardware bug in RK3288, the only way to solve it is to
>>> reset the phy.
>>>
>>> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
>>> ---
>>>
>>>  drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
>>>  1 file changed, 20 insertions(+)
>>>
>>> diff --git a/drivers/phy/phy-rockchip-usb.c
>>> b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644
>>> --- a/drivers/phy/phy-rockchip-usb.c
>>> +++ b/drivers/phy/phy-rockchip-usb.c
>>> @@ -29,6 +29,7 @@
>>>
>>>  #include <linux/reset.h>
>>>  #include <linux/regmap.h>
>>>  #include <linux/mfd/syscon.h>
>>>
>>> +#include <linux/delay.h>
>>>
>>>  static int enable_usb_uart;
>>>
>>> @@ -64,6 +65,7 @@ struct rockchip_usb_phy {
>>>
>>>  	struct clk_hw	clk480m_hw;
>>>  	struct phy	*phy;
>>>  	bool		uart_enabled;
>>>
>>> +	struct reset_control *reset;
>>>
>>>  };
>>>  
>>>  static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
>>>
>>> @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy
>>> *_phy)
>>>
>>>  	return clk_prepare_enable(phy->clk480m);
>>>  
>>>  }
>>>
>>> +static int rockchip_usb_phy_reset(struct phy *_phy)
>>> +{
>>> +	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
>>> +
>>> +	if (phy->reset) {
>>> +		reset_control_assert(phy->reset);
>>> +		udelay(10);
>>> +		reset_control_deassert(phy->reset);
>>> +	}
>>> +
>>> +	return 0;
>>> +}
>>> +
>>>
>>>  static const struct phy_ops ops = {
>>>  
>>>  	.power_on	= rockchip_usb_phy_power_on,
>>>  	.power_off	= rockchip_usb_phy_power_off,
>>>
>>> +	.reset		= rockchip_usb_phy_reset,
>>
>> why not just reuse the .init ops? reset can be done during initialization
>> right?
> 
> The naming of power_on + power_off and init + exit probably suggests that they 
> are supposed to be used in pairs. (aka module_init + module_exit and probably 
> more)
> 
> But in fact I've seen different combinations so far (phy_init + phy_power_on 
> ... phy_power_off + phy_exit but also phy_power_on + phy_init ... phy_exit + 
> phy_power_off), so I guess the semantics are not that strictly defined.

yeah, it got difficult to maintain the semantics once the number of phy users
increased. Thought it was better than bloating the framework with platform
specific callbacks.

Thanks
Kishon
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[PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Randy Li]

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

The original patches came from Doug Anderson <dianders@chromium.org>.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 drivers/usb/dwc2/core_intr.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9..c31c3fe 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
 static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 {
 	int ret;
+	struct device_node *np = hsotg->dev->of_node;
 
 	/* Clear interrupt */
 	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
@@ -379,6 +380,14 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/* It is a quirk in Rockchip RK3288, causing by
+			 * a hardware bug. This will propagate out and
+			 * eventually we'll re-enumerate the device. 
+			 * Not great but the best we can do */
+			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
+				hsotg->phy->ops->reset(hsotg->phy);
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
-- 
2.7.4

Re: [PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Sergei Shtylyov]

Hello.

On 08/20/2016 11:32 PM, Randy Li wrote:

> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend).
>
> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
>
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit) in chip, which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).
>
> It's unfortunate that we need to do a full re-enumeration of devices at
> wakeup time, but this is better than alternative of letting the bus get
> wedged.
>
> The original patches came from Doug Anderson <dianders@chromium.org>.
>
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  drivers/usb/dwc2/core_intr.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
> index d85c5c9..c31c3fe 100644
> --- a/drivers/usb/dwc2/core_intr.c
> +++ b/drivers/usb/dwc2/core_intr.c
[...]
> @@ -379,6 +380,14 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>  			/* Restart the Phy Clock */
>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
> +
> +			/* It is a quirk in Rockchip RK3288, causing by
> +			 * a hardware bug. This will propagate out and
> +			 * eventually we'll re-enumerate the device.
> +			 * Not great but the best we can do */

   The preferred multi-line comment style is this:

/*
  * bla
  * bla
  */

    Yours is close. :-)

[...]

MBR, Sergei

[PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32

[Randy Li]

Hello All:
 This version would move reset into phy. I wanted to implement a hard
code version but I meet some problem with ioremap reset controller,
in order to keep my word, I offer this version this time.

Changelog:
v5
  A few modification at style, add the missing doc in the last 
  commit.
v4
  1. Adding the reset callback in struct phy_ops.
  2. Moving the reset into phy rockchip usb.
  3. Trying to call a reset when dwc2 wakeup in rk3288.
v3
 Rebased from previous commit.

Randy Li (4):
  phy: Add reset callback
  phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during
    wakeup
  usb: dwc2: assert phy reset when waking up in rk3288 platform
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 arch/arm/boot/dts/rk3288.dtsi  |  5 +++++
 drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
 drivers/usb/dwc2/core_intr.c   |  9 +++++++++
 include/linux/phy/phy.h        |  2 ++
 4 files changed, 36 insertions(+)

-- 
2.7.4

[PATCH 0/4 v5] usb: dwc2: fix the usb host for host port at RK32

[Randy Li]

Hello All:
 This version would move reset into phy. I wanted to implement a hard
code version but I meet some problem with ioremap reset controller,
in order to keep my word, I offer this version this time.

Changelog:
v5
  A few modification at style, add the missing doc in the last 
  commit.
v4
  1. Adding the reset callback in struct phy_ops.
  2. Moving the reset into phy rockchip usb.
  3. Trying to call a reset when dwc2 wakeup in rk3288.
v3
 Rebased from previous commit.

Randy Li (4):
  phy: Add reset callback
  phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during
    wakeup
  usb: dwc2: assert phy reset when waking up in rk3288 platform
  ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

 arch/arm/boot/dts/rk3288.dtsi  |  5 +++++
 drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++
 drivers/usb/dwc2/core_intr.c   |  9 +++++++++
 include/linux/phy/phy.h        |  2 ++
 4 files changed, 36 insertions(+)

-- 
2.7.4

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[PATCH 1/4] phy: Add reset callback

[Randy Li]

The only use for this is for solving a hardware design problem in
usb of Rockchip RK3288.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 include/linux/phy/phy.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index f08b672..4d34607 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -36,6 +36,7 @@ enum phy_mode {
  * @power_on: powering on the phy
  * @power_off: powering off the phy
  * @set_mode: set the mode of the phy
+ * @reset: reseting the phy
  * @owner: the module owner containing the ops
  */
 struct phy_ops {
@@ -44,6 +45,7 @@ struct phy_ops {
 	int	(*power_on)(struct phy *phy);
 	int	(*power_off)(struct phy *phy);
 	int	(*set_mode)(struct phy *phy, enum phy_mode mode);
+	int	(*reset)(struct phy *phy);
 	struct module *owner;
 };
 
-- 
2.7.4

[PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Randy Li]

It is a hardware bug in RK3288, the only way to solve it is to
reset the phy.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 .../devicetree/bindings/phy/rockchip-usb-phy.txt     |  3 +++
 drivers/phy/phy-rockchip-usb.c                       | 20 ++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
index cc6be96..57dc388 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
@@ -27,6 +27,9 @@ Optional Properties:
 - clocks : phandle + clock specifier for the phy clocks
 - clock-names: string, clock name, must be "phyclk"
 - #clock-cells: for users of the phy-pll, should be 0
+- reset-names: Only allow the following entries:
+ - phy-reset
+- resets: Must contain an entry for each entry in reset-names.
 
 Example:
 
diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
index 2a7381f..734987f 100644
--- a/drivers/phy/phy-rockchip-usb.c
+++ b/drivers/phy/phy-rockchip-usb.c
@@ -29,6 +29,7 @@
 #include <linux/reset.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <linux/delay.h>
 
 static int enable_usb_uart;
 
@@ -64,6 +65,7 @@ struct rockchip_usb_phy {
 	struct clk_hw	clk480m_hw;
 	struct phy	*phy;
 	bool		uart_enabled;
+	struct reset_control *reset;
 };
 
 static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
@@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
 	return clk_prepare_enable(phy->clk480m);
 }
 
+static int rockchip_usb_phy_reset(struct phy *_phy)
+{
+	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
+
+	if (phy->reset) {
+		reset_control_assert(phy->reset);
+		udelay(10);
+		reset_control_deassert(phy->reset);
+	}
+
+	return 0;
+}
+
 static const struct phy_ops ops = {
 	.power_on	= rockchip_usb_phy_power_on,
 	.power_off	= rockchip_usb_phy_power_off,
+	.reset		= rockchip_usb_phy_reset,
 	.owner		= THIS_MODULE,
 };
 
@@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base,
 		return -EINVAL;
 	}
 
+	rk_phy->reset = of_reset_control_get(child, "phy-reset");
+	if (IS_ERR(rk_phy->reset))
+		rk_phy->reset = NULL;
+
 	rk_phy->reg_offset = reg_offset;
 
 	rk_phy->clk = of_clk_get_by_name(child, "phyclk");
-- 
2.7.4

[PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Randy Li]

It is a hardware bug in RK3288, the only way to solve it is to
reset the phy.

Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
---
 .../devicetree/bindings/phy/rockchip-usb-phy.txt     |  3 +++
 drivers/phy/phy-rockchip-usb.c                       | 20 ++++++++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
index cc6be96..57dc388 100644
--- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
@@ -27,6 +27,9 @@ Optional Properties:
 - clocks : phandle + clock specifier for the phy clocks
 - clock-names: string, clock name, must be "phyclk"
 - #clock-cells: for users of the phy-pll, should be 0
+- reset-names: Only allow the following entries:
+ - phy-reset
+- resets: Must contain an entry for each entry in reset-names.
 
 Example:
 
diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
index 2a7381f..734987f 100644
--- a/drivers/phy/phy-rockchip-usb.c
+++ b/drivers/phy/phy-rockchip-usb.c
@@ -29,6 +29,7 @@
 #include <linux/reset.h>
 #include <linux/regmap.h>
 #include <linux/mfd/syscon.h>
+#include <linux/delay.h>
 
 static int enable_usb_uart;
 
@@ -64,6 +65,7 @@ struct rockchip_usb_phy {
 	struct clk_hw	clk480m_hw;
 	struct phy	*phy;
 	bool		uart_enabled;
+	struct reset_control *reset;
 };
 
 static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
@@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
 	return clk_prepare_enable(phy->clk480m);
 }
 
+static int rockchip_usb_phy_reset(struct phy *_phy)
+{
+	struct rockchip_usb_phy *phy = phy_get_drvdata(_phy);
+
+	if (phy->reset) {
+		reset_control_assert(phy->reset);
+		udelay(10);
+		reset_control_deassert(phy->reset);
+	}
+
+	return 0;
+}
+
 static const struct phy_ops ops = {
 	.power_on	= rockchip_usb_phy_power_on,
 	.power_off	= rockchip_usb_phy_power_off,
+	.reset		= rockchip_usb_phy_reset,
 	.owner		= THIS_MODULE,
 };
 
@@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base,
 		return -EINVAL;
 	}
 
+	rk_phy->reset = of_reset_control_get(child, "phy-reset");
+	if (IS_ERR(rk_phy->reset))
+		rk_phy->reset = NULL;
+
 	rk_phy->reg_offset = reg_offset;
 
 	rk_phy->clk = of_clk_get_by_name(child, "phyclk");
-- 
2.7.4

Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Rob Herring]

On Sun, Aug 21, 2016 at 03:56:43PM +0800, Randy Li wrote:
> It is a hardware bug in RK3288, the only way to solve it is to
> reset the phy.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  .../devicetree/bindings/phy/rockchip-usb-phy.txt     |  3 +++
>  drivers/phy/phy-rockchip-usb.c                       | 20 ++++++++++++++++++++
>  2 files changed, 23 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup

[Rob Herring]

On Sun, Aug 21, 2016 at 03:56:43PM +0800, Randy Li wrote:
> It is a hardware bug in RK3288, the only way to solve it is to
> reset the phy.
> 
> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
> ---
>  .../devicetree/bindings/phy/rockchip-usb-phy.txt     |  3 +++
>  drivers/phy/phy-rockchip-usb.c                       | 20 ++++++++++++++++++++
>  2 files changed, 23 insertions(+)

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

[PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Randy Li]

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

The original patches came from Doug Anderson <dianders@chromium.org>.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 drivers/usb/dwc2/core_intr.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9..f57c48a 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
 static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 {
 	int ret;
+	struct device_node *np = hsotg->dev->of_node;
 
 	/* Clear interrupt */
 	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
@@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/* 
+			 * It is a quirk in Rockchip RK3288, causing by
+			 * a hardware bug. This will propagate out and
+			 * eventually we'll re-enumerate the device. 
+			 * Not great but the best we can do 
+			 */
+			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
+				hsotg->phy->ops->reset(hsotg->phy);
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
-- 
2.7.4

[PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Randy Li]

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

This patch came from Doug Anderson <dianders@chromium.org> originally.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 arch/arm/boot/dts/rk3288.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 48ca4e4..646f49d 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -855,6 +855,8 @@
 				clocks = <&cru SCLK_OTGPHY0>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBOTG_PHY>;
+				reset-names = "phy-reset";
 			};
 
 			usbphy1: usb-phy@334 {
@@ -871,6 +873,9 @@
 				clocks = <&cru SCLK_OTGPHY2>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBHOST1_PHY>;
+				reset-names = "phy-reset";
+
 			};
 		};
 	};
-- 
2.7.4

Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Sergei Shtylyov]

Hello.

On 8/21/2016 10:56 AM, Randy Li wrote:

> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
> has a hardware errata that causes everything to get confused when we get
> a remote wakeup.  We'll use the reset that's in the CRU to reset the
> port when it's in a bad state.
>
> Note that we add the reset to both dwc2 controllers even though only one
> has the errata in case we find some other use for this reset that's
> unrelated to the current hardware errata.  Only the host port gets the
> quirk property, though.
>
> This patch came from Doug Anderson <dianders@chromium.org> originally.

    Was it signed off by him? Don't you need to keep his authorship via th 
"From:" tag?

> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  arch/arm/boot/dts/rk3288.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 48ca4e4..646f49d 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
[...]
> @@ -871,6 +873,9 @@
>  				clocks = <&cru SCLK_OTGPHY2>;
>  				clock-names = "phyclk";
>  				#clock-cells = <0>;
> +				resets = <&cru SRST_USBHOST1_PHY>;
> +				reset-names = "phy-reset";
> +

    Don't need empty line here.

>  			};
>  		};
>  	};

MBR , Sergei

Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[ayaka]

On 08/21/2016 07:06 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 8/21/2016 10:56 AM, Randy Li wrote:
>
>> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
>> has a hardware errata that causes everything to get confused when we get
>> a remote wakeup.  We'll use the reset that's in the CRU to reset the
>> port when it's in a bad state.
>>
>> Note that we add the reset to both dwc2 controllers even though only one
>> has the errata in case we find some other use for this reset that's
>> unrelated to the current hardware errata.  Only the host port gets the
>> quirk property, though.
>>
>> This patch came from Doug Anderson <dianders@chromium.org> originally.
>
>    Was it signed off by him? Don't you need to keep his authorship via 
> th "From:" tag?
I would rather the idea comes from him, but the implementation is 
different. I don't which tag would be
better? If the "From:" would be the best choice. I would resend the last 
two patches.
>> Signed-off-by: Randy Li <ayaka@soulik.info>
>> ---
>>  arch/arm/boot/dts/rk3288.dtsi | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rk3288.dtsi 
>> b/arch/arm/boot/dts/rk3288.dtsi
>> index 48ca4e4..646f49d 100644
>> --- a/arch/arm/boot/dts/rk3288.dtsi
>> +++ b/arch/arm/boot/dts/rk3288.dtsi
> [...]
>> @@ -871,6 +873,9 @@
>>                  clocks = <&cru SCLK_OTGPHY2>;
>>                  clock-names = "phyclk";
>>                  #clock-cells = <0>;
>> +                resets = <&cru SRST_USBHOST1_PHY>;
>> +                reset-names = "phy-reset";
>> +
>
>    Don't need empty line here.
I would be removed
>
>>              };
>>          };
>>      };
>
> MBR , Sergei

Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[ayaka]

On 08/21/2016 07:06 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 8/21/2016 10:56 AM, Randy Li wrote:
>
>> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
>> has a hardware errata that causes everything to get confused when we get
>> a remote wakeup.  We'll use the reset that's in the CRU to reset the
>> port when it's in a bad state.
>>
>> Note that we add the reset to both dwc2 controllers even though only one
>> has the errata in case we find some other use for this reset that's
>> unrelated to the current hardware errata.  Only the host port gets the
>> quirk property, though.
>>
>> This patch came from Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> originally.
>
>    Was it signed off by him? Don't you need to keep his authorship via 
> th "From:" tag?
I would rather the idea comes from him, but the implementation is 
different. I don't which tag would be
better? If the "From:" would be the best choice. I would resend the last 
two patches.
>> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
>> ---
>>  arch/arm/boot/dts/rk3288.dtsi | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rk3288.dtsi 
>> b/arch/arm/boot/dts/rk3288.dtsi
>> index 48ca4e4..646f49d 100644
>> --- a/arch/arm/boot/dts/rk3288.dtsi
>> +++ b/arch/arm/boot/dts/rk3288.dtsi
> [...]
>> @@ -871,6 +873,9 @@
>>                  clocks = <&cru SCLK_OTGPHY2>;
>>                  clock-names = "phyclk";
>>                  #clock-cells = <0>;
>> +                resets = <&cru SRST_USBHOST1_PHY>;
>> +                reset-names = "phy-reset";
>> +
>
>    Don't need empty line here.
I would be removed
>
>>              };
>>          };
>>      };
>
> MBR , Sergei

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Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Sergei Shtylyov]

Hello.

On 8/21/2016 3:19 PM, ayaka wrote:

>>> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
>>> has a hardware errata that causes everything to get confused when we get
>>> a remote wakeup.  We'll use the reset that's in the CRU to reset the
>>> port when it's in a bad state.
>>>
>>> Note that we add the reset to both dwc2 controllers even though only one
>>> has the errata in case we find some other use for this reset that's
>>> unrelated to the current hardware errata.  Only the host port gets the
>>> quirk property, though.
>>>
>>> This patch came from Doug Anderson <dianders@chromium.org> originally.
>>
>>    Was it signed off by him? Don't you need to keep his authorship via th
>> "From:" tag?

> I would rather the idea comes from him, but the implementation is different. I

    Then write exactly that. Because now it sounds like the patch itself was 
originated from him.

> don't which tag would be
> better? If the "From:" would be the best choice. I would resend the last two
> patches.

    There's also "Suggested-by:" tag which might fit here.

>>> Signed-off-by: Randy Li <ayaka@soulik.info>
[...]

MBR, Sergei

Re: [PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Sergei Shtylyov]

Hello.

On 8/21/2016 3:19 PM, ayaka wrote:

>>> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
>>> has a hardware errata that causes everything to get confused when we get
>>> a remote wakeup.  We'll use the reset that's in the CRU to reset the
>>> port when it's in a bad state.
>>>
>>> Note that we add the reset to both dwc2 controllers even though only one
>>> has the errata in case we find some other use for this reset that's
>>> unrelated to the current hardware errata.  Only the host port gets the
>>> quirk property, though.
>>>
>>> This patch came from Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> originally.
>>
>>    Was it signed off by him? Don't you need to keep his authorship via th
>> "From:" tag?

> I would rather the idea comes from him, but the implementation is different. I

    Then write exactly that. Because now it sounds like the patch itself was 
originated from him.

> don't which tag would be
> better? If the "From:" would be the best choice. I would resend the last two
> patches.

    There's also "Suggested-by:" tag which might fit here.

>>> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
[...]

MBR, Sergei

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[RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Randy Li]

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 drivers/usb/dwc2/core_intr.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9..f57c48a 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
 static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 {
 	int ret;
+	struct device_node *np = hsotg->dev->of_node;
 
 	/* Clear interrupt */
 	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
@@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/* 
+			 * It is a quirk in Rockchip RK3288, causing by
+			 * a hardware bug. This will propagate out and
+			 * eventually we'll re-enumerate the device. 
+			 * Not great but the best we can do 
+			 */
+			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
+				hsotg->phy->ops->reset(hsotg->phy);
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
-- 
2.7.4

[RESEND PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Randy Li]

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 arch/arm/boot/dts/rk3288.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 48ca4e4..de54604 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -855,6 +855,8 @@
 				clocks = <&cru SCLK_OTGPHY0>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBOTG_PHY>;
+				reset-names = "phy-reset";
 			};
 
 			usbphy1: usb-phy@334 {
@@ -871,6 +873,8 @@
 				clocks = <&cru SCLK_OTGPHY2>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBHOST1_PHY>;
+				reset-names = "phy-reset";
 			};
 		};
 	};
-- 
2.7.4

[RESEND PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Randy Li]

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
---
 arch/arm/boot/dts/rk3288.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 48ca4e4..de54604 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -855,6 +855,8 @@
 				clocks = <&cru SCLK_OTGPHY0>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBOTG_PHY>;
+				reset-names = "phy-reset";
 			};
 
 			usbphy1: usb-phy@334 {
@@ -871,6 +873,8 @@
 				clocks = <&cru SCLK_OTGPHY2>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBHOST1_PHY>;
+				reset-names = "phy-reset";
 			};
 		};
 	};
-- 
2.7.4

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Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[John Youn]

On 8/21/2016 12:32 PM, Randy Li wrote:
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend).
> 
> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
> 
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit) in chip, which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).
> 
> It's unfortunate that we need to do a full re-enumeration of devices at
> wakeup time, but this is better than alternative of letting the bus get
> wedged.
> 
> Signed-off-by: Randy Li <ayaka@soulik.info>
> ---
>  drivers/usb/dwc2/core_intr.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
> index d85c5c9..f57c48a 100644
> --- a/drivers/usb/dwc2/core_intr.c
> +++ b/drivers/usb/dwc2/core_intr.c
> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>  static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>  {
>  	int ret;
> +	struct device_node *np = hsotg->dev->of_node;
>  
>  	/* Clear interrupt */
>  	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>  			/* Restart the Phy Clock */
>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
> +
> +			/* 
> +			 * It is a quirk in Rockchip RK3288, causing by
> +			 * a hardware bug. This will propagate out and
> +			 * eventually we'll re-enumerate the device. 
> +			 * Not great but the best we can do 

Remove the trailing whitespaces in this comment.

Run scripts/checkpatch.pl to catch these.

> +			 */
> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
> +				hsotg->phy->ops->reset(hsotg->phy);
> +

You should probably check for NULL before calling the reset()
callback.

Also, I'd rather see a generic quirk property that you set for your
platform.

Something like "phy_reset_on_wakeup_quirk".

Also, try to preserve the version tag in your subject for all the
patches so that we can easily identify the latest version of the
series, like:

[PATCH v5 3/4] ...

And, typically "RESEND" means there are no code change.

Regards,
John

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[John Youn]

On 8/21/2016 12:32 PM, Randy Li wrote:
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend).
> 
> We can get the PHY out of its bad state by asserting its "port reset",
> but unfortunately that seems to assert a reset onto the USB bus so it
> could confuse things if we don't actually deenumerate / reenumerate the
> device.
> 
> We can also get the PHY out of its bad state by fully resetting it using
> the reset from the CRU (clock reset unit) in chip, which does a more full
> reset.  The CRU-based reset appears to actually cause devices on the bus
> to be removed and reinserted, which fixes the problem (albeit in a hacky
> way).
> 
> It's unfortunate that we need to do a full re-enumeration of devices at
> wakeup time, but this is better than alternative of letting the bus get
> wedged.
> 
> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
> ---
>  drivers/usb/dwc2/core_intr.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
> index d85c5c9..f57c48a 100644
> --- a/drivers/usb/dwc2/core_intr.c
> +++ b/drivers/usb/dwc2/core_intr.c
> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>  static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>  {
>  	int ret;
> +	struct device_node *np = hsotg->dev->of_node;
>  
>  	/* Clear interrupt */
>  	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>  			/* Restart the Phy Clock */
>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
> +
> +			/* 
> +			 * It is a quirk in Rockchip RK3288, causing by
> +			 * a hardware bug. This will propagate out and
> +			 * eventually we'll re-enumerate the device. 
> +			 * Not great but the best we can do 

Remove the trailing whitespaces in this comment.

Run scripts/checkpatch.pl to catch these.

> +			 */
> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
> +				hsotg->phy->ops->reset(hsotg->phy);
> +

You should probably check for NULL before calling the reset()
callback.

Also, I'd rather see a generic quirk property that you set for your
platform.

Something like "phy_reset_on_wakeup_quirk".

Also, try to preserve the version tag in your subject for all the
patches so that we can easily identify the latest version of the
series, like:

[PATCH v5 3/4] ...

And, typically "RESEND" means there are no code change.

Regards,
John

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Randy Li]

On 08/24/2016 04:46 AM, John Youn wrote:
> On 8/21/2016 12:32 PM, Randy Li wrote:
>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>> port) the PHY can get into a bad state when a wakeup is asserted (not
>> just a wakeup from full system suspend but also a wakeup from
>> autosuspend).
>>
>> We can get the PHY out of its bad state by asserting its "port reset",
>> but unfortunately that seems to assert a reset onto the USB bus so it
>> could confuse things if we don't actually deenumerate / reenumerate the
>> device.
>>
>> We can also get the PHY out of its bad state by fully resetting it using
>> the reset from the CRU (clock reset unit) in chip, which does a more full
>> reset.  The CRU-based reset appears to actually cause devices on the bus
>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>> way).
>>
>> It's unfortunate that we need to do a full re-enumeration of devices at
>> wakeup time, but this is better than alternative of letting the bus get
>> wedged.
>>
>> Signed-off-by: Randy Li <ayaka@soulik.info>
>> ---
>>  drivers/usb/dwc2/core_intr.c | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>> index d85c5c9..f57c48a 100644
>> --- a/drivers/usb/dwc2/core_intr.c
>> +++ b/drivers/usb/dwc2/core_intr.c
>> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>>  static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>  {
>>  	int ret;
>> +	struct device_node *np = hsotg->dev->of_node;
>>
>>  	/* Clear interrupt */
>>  	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
>> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>  			/* Restart the Phy Clock */
>>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>> +
>> +			/*
>> +			 * It is a quirk in Rockchip RK3288, causing by
>> +			 * a hardware bug. This will propagate out and
>> +			 * eventually we'll re-enumerate the device.
>> +			 * Not great but the best we can do
>
> Remove the trailing whitespaces in this comment.
>
> Run scripts/checkpatch.pl to catch these.
I see.
>
>> +			 */
>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>> +				hsotg->phy->ops->reset(hsotg->phy);
>> +
>
> You should probably check for NULL before calling the reset()
> callback.
Sure.
>
> Also, I'd rather see a generic quirk property that you set for your
> platform.
>
> Something like "phy_reset_on_wakeup_quirk".
But Rob Herring want me to implied by the SoC specific compatible 
string. I agree with him. It is certainly bug in RK3288 platform.
It is no found no the other platform.
>
> Also, try to preserve the version tag in your subject for all the
> patches so that we can easily identify the latest version of the
> series, like:
>
> [PATCH v5 3/4] ...
>
> And, typically "RESEND" means there are no code change.
I see, I just make up my mind whether code style is new version
before. I won't again.

Thank you very much.
>
> Regards,
> John
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>

-- 
Randy Li
The third produce department

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Randy Li]

On 08/24/2016 04:46 AM, John Youn wrote:
> On 8/21/2016 12:32 PM, Randy Li wrote:
>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>> port) the PHY can get into a bad state when a wakeup is asserted (not
>> just a wakeup from full system suspend but also a wakeup from
>> autosuspend).
>>
>> We can get the PHY out of its bad state by asserting its "port reset",
>> but unfortunately that seems to assert a reset onto the USB bus so it
>> could confuse things if we don't actually deenumerate / reenumerate the
>> device.
>>
>> We can also get the PHY out of its bad state by fully resetting it using
>> the reset from the CRU (clock reset unit) in chip, which does a more full
>> reset.  The CRU-based reset appears to actually cause devices on the bus
>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>> way).
>>
>> It's unfortunate that we need to do a full re-enumeration of devices at
>> wakeup time, but this is better than alternative of letting the bus get
>> wedged.
>>
>> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
>> ---
>>  drivers/usb/dwc2/core_intr.c | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>> index d85c5c9..f57c48a 100644
>> --- a/drivers/usb/dwc2/core_intr.c
>> +++ b/drivers/usb/dwc2/core_intr.c
>> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>>  static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>  {
>>  	int ret;
>> +	struct device_node *np = hsotg->dev->of_node;
>>
>>  	/* Clear interrupt */
>>  	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
>> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>  			/* Restart the Phy Clock */
>>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>> +
>> +			/*
>> +			 * It is a quirk in Rockchip RK3288, causing by
>> +			 * a hardware bug. This will propagate out and
>> +			 * eventually we'll re-enumerate the device.
>> +			 * Not great but the best we can do
>
> Remove the trailing whitespaces in this comment.
>
> Run scripts/checkpatch.pl to catch these.
I see.
>
>> +			 */
>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>> +				hsotg->phy->ops->reset(hsotg->phy);
>> +
>
> You should probably check for NULL before calling the reset()
> callback.
Sure.
>
> Also, I'd rather see a generic quirk property that you set for your
> platform.
>
> Something like "phy_reset_on_wakeup_quirk".
But Rob Herring want me to implied by the SoC specific compatible 
string. I agree with him. It is certainly bug in RK3288 platform.
It is no found no the other platform.
>
> Also, try to preserve the version tag in your subject for all the
> patches so that we can easily identify the latest version of the
> series, like:
>
> [PATCH v5 3/4] ...
>
> And, typically "RESEND" means there are no code change.
I see, I just make up my mind whether code style is new version
before. I won't again.

Thank you very much.
>
> Regards,
> John
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
>

-- 
Randy Li
The third produce department

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[John Youn]

On 8/24/2016 1:54 AM, Randy Li wrote:
> 
> 
> On 08/24/2016 04:46 AM, John Youn wrote:
>> On 8/21/2016 12:32 PM, Randy Li wrote:
>>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>>> port) the PHY can get into a bad state when a wakeup is asserted (not
>>> just a wakeup from full system suspend but also a wakeup from
>>> autosuspend).
>>>
>>> We can get the PHY out of its bad state by asserting its "port reset",
>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>> could confuse things if we don't actually deenumerate / reenumerate the
>>> device.
>>>
>>> We can also get the PHY out of its bad state by fully resetting it using
>>> the reset from the CRU (clock reset unit) in chip, which does a more full
>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>> way).
>>>
>>> It's unfortunate that we need to do a full re-enumeration of devices at
>>> wakeup time, but this is better than alternative of letting the bus get
>>> wedged.
>>>
>>> Signed-off-by: Randy Li <ayaka@soulik.info>
>>> ---
>>>  drivers/usb/dwc2/core_intr.c | 11 +++++++++++
>>>  1 file changed, 11 insertions(+)
>>>
>>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>>> index d85c5c9..f57c48a 100644
>>> --- a/drivers/usb/dwc2/core_intr.c
>>> +++ b/drivers/usb/dwc2/core_intr.c
>>> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>>>  static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>>  {
>>>  	int ret;
>>> +	struct device_node *np = hsotg->dev->of_node;
>>>
>>>  	/* Clear interrupt */
>>>  	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
>>> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>>  			/* Restart the Phy Clock */
>>>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>>>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>>> +
>>> +			/*
>>> +			 * It is a quirk in Rockchip RK3288, causing by
>>> +			 * a hardware bug. This will propagate out and
>>> +			 * eventually we'll re-enumerate the device.
>>> +			 * Not great but the best we can do
>>
>> Remove the trailing whitespaces in this comment.
>>
>> Run scripts/checkpatch.pl to catch these.
> I see.
>>
>>> +			 */
>>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>>> +				hsotg->phy->ops->reset(hsotg->phy);
>>> +
>>
>> You should probably check for NULL before calling the reset()
>> callback.
> Sure.
>>
>> Also, I'd rather see a generic quirk property that you set for your
>> platform.
>>
>> Something like "phy_reset_on_wakeup_quirk".
> But Rob Herring want me to implied by the SoC specific compatible 
> string. I agree with him. It is certainly bug in RK3288 platform.
> It is no found no the other platform.

Ok, I missed that before.

Based on the drivers I'm familiar with (like dwc3), you would typically add a
"quirk" anyways.

Felipe,

Do you have some policy or preference on this?

Regards,
John

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[John Youn]

On 8/24/2016 1:54 AM, Randy Li wrote:
> 
> 
> On 08/24/2016 04:46 AM, John Youn wrote:
>> On 8/21/2016 12:32 PM, Randy Li wrote:
>>> On the rk3288 USB host-only port (the one that's not the OTG-enabled
>>> port) the PHY can get into a bad state when a wakeup is asserted (not
>>> just a wakeup from full system suspend but also a wakeup from
>>> autosuspend).
>>>
>>> We can get the PHY out of its bad state by asserting its "port reset",
>>> but unfortunately that seems to assert a reset onto the USB bus so it
>>> could confuse things if we don't actually deenumerate / reenumerate the
>>> device.
>>>
>>> We can also get the PHY out of its bad state by fully resetting it using
>>> the reset from the CRU (clock reset unit) in chip, which does a more full
>>> reset.  The CRU-based reset appears to actually cause devices on the bus
>>> to be removed and reinserted, which fixes the problem (albeit in a hacky
>>> way).
>>>
>>> It's unfortunate that we need to do a full re-enumeration of devices at
>>> wakeup time, but this is better than alternative of letting the bus get
>>> wedged.
>>>
>>> Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
>>> ---
>>>  drivers/usb/dwc2/core_intr.c | 11 +++++++++++
>>>  1 file changed, 11 insertions(+)
>>>
>>> diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
>>> index d85c5c9..f57c48a 100644
>>> --- a/drivers/usb/dwc2/core_intr.c
>>> +++ b/drivers/usb/dwc2/core_intr.c
>>> @@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
>>>  static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>>  {
>>>  	int ret;
>>> +	struct device_node *np = hsotg->dev->of_node;
>>>
>>>  	/* Clear interrupt */
>>>  	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
>>> @@ -379,6 +380,16 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
>>>  			/* Restart the Phy Clock */
>>>  			pcgcctl &= ~PCGCTL_STOPPCLK;
>>>  			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
>>> +
>>> +			/*
>>> +			 * It is a quirk in Rockchip RK3288, causing by
>>> +			 * a hardware bug. This will propagate out and
>>> +			 * eventually we'll re-enumerate the device.
>>> +			 * Not great but the best we can do
>>
>> Remove the trailing whitespaces in this comment.
>>
>> Run scripts/checkpatch.pl to catch these.
> I see.
>>
>>> +			 */
>>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>>> +				hsotg->phy->ops->reset(hsotg->phy);
>>> +
>>
>> You should probably check for NULL before calling the reset()
>> callback.
> Sure.
>>
>> Also, I'd rather see a generic quirk property that you set for your
>> platform.
>>
>> Something like "phy_reset_on_wakeup_quirk".
> But Rob Herring want me to implied by the SoC specific compatible 
> string. I agree with him. It is certainly bug in RK3288 platform.
> It is no found no the other platform.

Ok, I missed that before.

Based on the drivers I'm familiar with (like dwc3), you would typically add a
"quirk" anyways.

Felipe,

Do you have some policy or preference on this?

Regards,
John

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1146 bytes --]


Hi,

John Youn <John.Youn@synopsys.com> writes:

[...]

>>>> +			 */
>>>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>>>> +				hsotg->phy->ops->reset(hsotg->phy);
>>>> +
>>>
>>> You should probably check for NULL before calling the reset()
>>> callback.
>> Sure.
>>>
>>> Also, I'd rather see a generic quirk property that you set for your
>>> platform.
>>>
>>> Something like "phy_reset_on_wakeup_quirk".
>> But Rob Herring want me to implied by the SoC specific compatible 
>> string. I agree with him. It is certainly bug in RK3288 platform.
>> It is no found no the other platform.
>
> Ok, I missed that before.
>
> Based on the drivers I'm familiar with (like dwc3), you would
> typically add a "quirk" anyways.
>
> Felipe,
>
> Do you have some policy or preference on this?

if it's not a dwc2-generic feature, then let's do it via compatible
flag, sure. What we don't want is for things like:

if (is_compatible('synopsys') || is_compatible('rockchip') ||
	is_compatible('foobar') ... )

For that, we'd be better of adding a generic quirk flag which several
can use.

-- 
balbi

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 800 bytes --]

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 1146 bytes --]


Hi,

John Youn <John.Youn@synopsys.com> writes:

[...]

>>>> +			 */
>>>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>>>> +				hsotg->phy->ops->reset(hsotg->phy);
>>>> +
>>>
>>> You should probably check for NULL before calling the reset()
>>> callback.
>> Sure.
>>>
>>> Also, I'd rather see a generic quirk property that you set for your
>>> platform.
>>>
>>> Something like "phy_reset_on_wakeup_quirk".
>> But Rob Herring want me to implied by the SoC specific compatible 
>> string. I agree with him. It is certainly bug in RK3288 platform.
>> It is no found no the other platform.
>
> Ok, I missed that before.
>
> Based on the drivers I'm familiar with (like dwc3), you would
> typically add a "quirk" anyways.
>
> Felipe,
>
> Do you have some policy or preference on this?

if it's not a dwc2-generic feature, then let's do it via compatible
flag, sure. What we don't want is for things like:

if (is_compatible('synopsys') || is_compatible('rockchip') ||
	is_compatible('foobar') ... )

For that, we'd be better of adding a generic quirk flag which several
can use.

-- 
balbi

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 800 bytes --]

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[John Youn]

On 8/29/2016 12:51 AM, Felipe Balbi wrote:
> 
> Hi,
> 
> John Youn <John.Youn@synopsys.com> writes:
> 
> [...]
> 
>>>>> +			 */
>>>>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>>>>> +				hsotg->phy->ops->reset(hsotg->phy);
>>>>> +
>>>>
>>>> You should probably check for NULL before calling the reset()
>>>> callback.
>>> Sure.
>>>>
>>>> Also, I'd rather see a generic quirk property that you set for your
>>>> platform.
>>>>
>>>> Something like "phy_reset_on_wakeup_quirk".
>>> But Rob Herring want me to implied by the SoC specific compatible 
>>> string. I agree with him. It is certainly bug in RK3288 platform.
>>> It is no found no the other platform.
>>
>> Ok, I missed that before.
>>
>> Based on the drivers I'm familiar with (like dwc3), you would
>> typically add a "quirk" anyways.
>>
>> Felipe,
>>
>> Do you have some policy or preference on this?
> 
> if it's not a dwc2-generic feature, then let's do it via compatible
> flag, sure. What we don't want is for things like:
> 
> if (is_compatible('synopsys') || is_compatible('rockchip') ||
> 	is_compatible('foobar') ... )
> 
> For that, we'd be better of adding a generic quirk flag which several
> can use.
> 

Alright sounds reasonable.

Randy, could you respin with the other feedback? There's no need to
add a quirk.

Regards,
John

Re: [RESEND PATCH 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform

[John Youn]

On 8/29/2016 12:51 AM, Felipe Balbi wrote:
> 
> Hi,
> 
> John Youn <John.Youn@synopsys.com> writes:
> 
> [...]
> 
>>>>> +			 */
>>>>> +			if (of_device_is_compatible(np, "rockchip,rk3288-usb"))
>>>>> +				hsotg->phy->ops->reset(hsotg->phy);
>>>>> +
>>>>
>>>> You should probably check for NULL before calling the reset()
>>>> callback.
>>> Sure.
>>>>
>>>> Also, I'd rather see a generic quirk property that you set for your
>>>> platform.
>>>>
>>>> Something like "phy_reset_on_wakeup_quirk".
>>> But Rob Herring want me to implied by the SoC specific compatible 
>>> string. I agree with him. It is certainly bug in RK3288 platform.
>>> It is no found no the other platform.
>>
>> Ok, I missed that before.
>>
>> Based on the drivers I'm familiar with (like dwc3), you would
>> typically add a "quirk" anyways.
>>
>> Felipe,
>>
>> Do you have some policy or preference on this?
> 
> if it's not a dwc2-generic feature, then let's do it via compatible
> flag, sure. What we don't want is for things like:
> 
> if (is_compatible('synopsys') || is_compatible('rockchip') ||
> 	is_compatible('foobar') ... )
> 
> For that, we'd be better of adding a generic quirk flag which several
> can use.
> 

Alright sounds reasonable.

Randy, could you respin with the other feedback? There's no need to
add a quirk.

Regards,
John

[PATCH 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Randy Li]

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

This patch came from Doug Anderson <dianders@chromium.org> originally.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 arch/arm/boot/dts/rk3288.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 48ca4e4..646f49d 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -855,6 +855,8 @@
 				clocks = <&cru SCLK_OTGPHY0>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBOTG_PHY>;
+				reset-names = "phy-reset";
 			};
 
 			usbphy1: usb-phy@334 {
@@ -871,6 +873,9 @@
 				clocks = <&cru SCLK_OTGPHY2>;
 				clock-names = "phyclk";
 				#clock-cells = <0>;
+				resets = <&cru SRST_USBHOST1_PHY>;
+				reset-names = "phy-reset";
+
 			};
 		};
 	};
-- 
2.7.4

[PATCH 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Randy Li]

From: Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

Signed-off-by: Douglas Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
 arch/arm/boot/dts/rk3288.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 3b44ef3..94fa26f 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -578,6 +578,9 @@
 		dr_mode = "host";
 		phys = <&usbphy2>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBHOST1_PHY>;
+		reset-names = "phy-full-reset";
+		snps,need-phy-full-reset-on-wake;
 		status = "disabled";
 	};
 
@@ -595,6 +598,8 @@
 		g-use-dma;
 		phys = <&usbphy0>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBOTG_PHY>;
+		reset-names = "phy-full-reset";
 		status = "disabled";
 	};
 
-- 
2.7.4


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[PATCH v2 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Douglas Anderson]

From: Doug Anderson <dianders@chromium.org>

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
Changes in v2:
- Use a full PHY reset for safety; no PHY changes needed for that.

 arch/arm/boot/dts/rk3288.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 906e938fb6bf..58773beb283f 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -496,6 +496,9 @@
 		dr_mode = "host";
 		phys = <&usbphy2>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBHOST1_PHY>;
+		reset-names = "phy-full-reset";
+		snps,need-phy-full-reset-on-wake;
 		status = "disabled";
 	};
 
@@ -513,6 +516,8 @@
 		g-use-dma;
 		phys = <&usbphy0>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBOTG_PHY>;
+		reset-names = "phy-full-reset";
 		status = "disabled";
 	};
 
-- 
2.6.0.rc2.230.g3dd15c0

[PATCH v2 2/2] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset

[Douglas Anderson]

From: Doug Anderson <dianders@chromium.org>

The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
has a hardware errata that causes everything to get confused when we get
a remote wakeup.  We'll use the reset that's in the CRU to reset the
port when it's in a bad state.

Note that we add the reset to both dwc2 controllers even though only one
has the errata in case we find some other use for this reset that's
unrelated to the current hardware errata.  Only the host port gets the
quirk property, though.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
Changes in v2:
- Use a full PHY reset for safety; no PHY changes needed for that.

 arch/arm/boot/dts/rk3288.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 906e938fb6bf..58773beb283f 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -496,6 +496,9 @@
 		dr_mode = "host";
 		phys = <&usbphy2>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBHOST1_PHY>;
+		reset-names = "phy-full-reset";
+		snps,need-phy-full-reset-on-wake;
 		status = "disabled";
 	};
 
@@ -513,6 +516,8 @@
 		g-use-dma;
 		phys = <&usbphy0>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBOTG_PHY>;
+		reset-names = "phy-full-reset";
 		status = "disabled";
 	};
 
-- 
2.6.0.rc2.230.g3dd15c0