From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZunDZ-0008Ks-QK for qemu-devel@nongnu.org; Fri, 06 Nov 2015 15:02:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZunDW-0002XW-Ss for qemu-devel@nongnu.org; Fri, 06 Nov 2015 15:02:37 -0500 Received: from mx1.redhat.com ([209.132.183.28]:57993) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZunDW-0002X9-OH for qemu-devel@nongnu.org; Fri, 06 Nov 2015 15:02:34 -0500 From: John Snow Date: Fri, 6 Nov 2015 15:02:28 -0500 Message-Id: <1446840151-9145-3-git-send-email-jsnow@redhat.com> In-Reply-To: <1446840151-9145-1-git-send-email-jsnow@redhat.com> References: <1446840151-9145-1-git-send-email-jsnow@redhat.com> Subject: [Qemu-devel] [PULL 2/5] ahci: Add some MMIO debug printfs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Peter Crosthwaite , jsnow@redhat.com, Peter Crosthwaite From: Peter Crosthwaite These are useful for bringup of AHCI. Signed-off-by: Peter Crosthwaite Reviewed-by: John Snow Message-id: 517ba413dce7deb4ab17c0cc1e8bbdaaace2a0db.1445917756.git.crosthwaite.peter@gmail.com Signed-off-by: John Snow --- hw/ide/ahci.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index f547ebb..7219189 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -378,17 +378,23 @@ static uint64_t ahci_mem_read(void *opaque, hwaddr addr, unsigned size) int ofst = addr - aligned; uint64_t lo = ahci_mem_read_32(opaque, aligned); uint64_t hi; + uint64_t val; /* if < 8 byte read does not cross 4 byte boundary */ if (ofst + size <= 4) { - return lo >> (ofst * 8); + val = lo >> (ofst * 8); + } else { + g_assert_cmpint(size, >, 1); + + /* If the 64bit read is unaligned, we will produce undefined + * results. AHCI does not support unaligned 64bit reads. */ + hi = ahci_mem_read_32(opaque, aligned + 4); + val = (hi << 32 | lo) >> (ofst * 8); } - g_assert_cmpint(size, >, 1); - /* If the 64bit read is unaligned, we will produce undefined - * results. AHCI does not support unaligned 64bit reads. */ - hi = ahci_mem_read_32(opaque, aligned + 4); - return (hi << 32 | lo) >> (ofst * 8); + DPRINTF(-1, "addr=0x%" HWADDR_PRIx " val=0x%" PRIx64 ", size=%d\n", + addr, val, size); + return val; } @@ -397,6 +403,9 @@ static void ahci_mem_write(void *opaque, hwaddr addr, { AHCIState *s = opaque; + DPRINTF(-1, "addr=0x%" HWADDR_PRIx " val=0x%" PRIx64 ", size=%d\n", + addr, val, size); + /* Only aligned reads are allowed on AHCI */ if (addr & 3) { fprintf(stderr, "ahci: Mis-aligned write to addr 0x" -- 2.4.3