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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Tue, 17 Nov 2015 11:40:04 +1100
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Subject: Re: [Qemu-devel] [PATCH 41/77] ppc/pnv: Add LPC controller and hook
 it up with a UART and RTC
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To: Alexey Kardashevskiy <aik@ozlabs.ru>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org

On Tue, 2015-11-17 at 11:32 +1100, Alexey Kardashevskiy wrote:
> On 11/11/2015 11:27 AM, Benjamin Herrenschmidt wrote:
> > This adds a model of the POWER8 LPC controller. It is then used
> > by the PowerNV code to attach a UART and RTC, which, with the right
> > version of OPAL firmware, will provide a working console.
> > 
> > This version of the LPC controller model doesn't yet implement
> > support for the SerIRQ deserializer present in the Naples version
> > of the chip though some preliminary work is there.
> > 
> 
> Is this LPC controller one per a chip or per a machine?

Per chip but we usually only wire one up per machine.

> In general it is quite nice when "-nodefaults" does not create
> neither PHB nor LPC so the user can add them manually with parameters
> different than defaults.

In this case though, PHB and LPC bridges are all part of the P8 chip,
and I'm trying to represent that topology as best as possible.

I think "-nodefaults" for Pnv should only be about the devices we
attach to the LPC/PHB not the busses themselves.

Cheers,
Ben.