From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44791) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a6uXD-0002XJ-5D for qemu-devel@nongnu.org; Thu, 10 Dec 2015 01:16:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a6uX9-00036i-QX for qemu-devel@nongnu.org; Thu, 10 Dec 2015 01:16:59 -0500 Received: from e23smtp05.au.ibm.com ([202.81.31.147]:39149) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a6uX9-000363-86 for qemu-devel@nongnu.org; Thu, 10 Dec 2015 01:16:55 -0500 Received: from localhost by e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 10 Dec 2015 16:16:52 +1000 Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp03.au.ibm.com (Postfix) with ESMTP id 23506357805B for ; Thu, 10 Dec 2015 17:16:51 +1100 (EST) Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id tBA6GMEg18743544 for ; Thu, 10 Dec 2015 17:16:32 +1100 Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id tBA6GFtL029579 for ; Thu, 10 Dec 2015 17:16:16 +1100 From: Bharata B Rao Date: Thu, 10 Dec 2015 11:45:37 +0530 Message-Id: <1449728144-6223-3-git-send-email-bharata@linux.vnet.ibm.com> In-Reply-To: <1449728144-6223-1-git-send-email-bharata@linux.vnet.ibm.com> References: <1449728144-6223-1-git-send-email-bharata@linux.vnet.ibm.com> Subject: [Qemu-devel] [RFC PATCH v0 2/9] cpu: Store CPU typename in MachineState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, ehabkost@redhat.com, Bharata B Rao , agraf@suse.de, borntraeger@de.ibm.com, imammedo@redhat.com, pbonzini@redhat.com, afaerber@suse.de, david@gibson.dropbear.id.au Storing CPU typename in MachineState lets us to create CPU threads for all architectures in uniform manner from arch-neutral code. TODO: Touching only i386 and spapr targets for now Signed-off-by: Bharata B Rao --- hw/i386/pc.c | 1 + hw/ppc/spapr.c | 2 ++ include/hw/boards.h | 1 + 3 files changed, 4 insertions(+) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 5e20e07..ffcd645 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1133,6 +1133,7 @@ void pc_cpus_init(PCMachineState *pcms) machine->cpu_model = "qemu32"; #endif } + machine->cpu_type = TYPE_X86_CPU; apic_id_limit = pc_apic_id_limit(max_cpus); if (apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) { diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 030ee35..db441f2 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1797,6 +1797,8 @@ static void ppc_spapr_init(MachineState *machine) if (machine->cpu_model == NULL) { machine->cpu_model = kvm_enabled() ? "host" : "POWER7"; } + machine->cpu_type = TYPE_POWERPC_CPU; + for (i = 0; i < smp_cpus; i++) { cpu = cpu_ppc_init(machine->cpu_model); if (cpu == NULL) { diff --git a/include/hw/boards.h b/include/hw/boards.h index 24eb6f0..a1f9512 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -128,6 +128,7 @@ struct MachineState { char *kernel_cmdline; char *initrd_filename; const char *cpu_model; + const char *cpu_type; AccelState *accelerator; }; -- 2.1.0