From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42997) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a81i8-0003Ol-2F for qemu-devel@nongnu.org; Sun, 13 Dec 2015 03:08:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a81i4-0001Lp-RU for qemu-devel@nongnu.org; Sun, 13 Dec 2015 03:08:51 -0500 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]:35403) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a81i4-0001Lj-Lw for qemu-devel@nongnu.org; Sun, 13 Dec 2015 03:08:48 -0500 Received: by mail-wm0-x229.google.com with SMTP id p66so6902641wmp.0 for ; Sun, 13 Dec 2015 00:08:48 -0800 (PST) From: Shmulik Ladkani Date: Sun, 13 Dec 2015 10:08:28 +0200 Message-Id: <1449994112-7054-3-git-send-email-shmulik.ladkani@ravellosystems.com> In-Reply-To: <1449994112-7054-1-git-send-email-shmulik.ladkani@ravellosystems.com> References: <1449994112-7054-1-git-send-email-shmulik.ladkani@ravellosystems.com> Subject: [Qemu-devel] [PATCH v2 2/6] vmw_pvscsi: Change offset of msi pci capability List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Dmitry Fleytman , Paolo Bonzini Cc: idan.brown@ravellosystems.com, qemu-devel@nongnu.org, Shmulik Ladkani Place device reported MSI capability at the same offset as placed by the VMware virtual hardware - at offset 0x7c. Signed-off-by: Shmulik Ladkani --- hw/scsi/vmw_pvscsi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index ce099f9..be95cff 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -32,7 +32,6 @@ #include "trace.h" -#define PVSCSI_MSI_OFFSET (0x50) #define PVSCSI_USE_64BIT (true) #define PVSCSI_PER_VECTOR_MASK (false) @@ -59,6 +58,8 @@ #define PVSCSI_USE_OLD_PCI_CONFIGURATION(s) \ ((s)->compat_flags & PVSCSI_COMPAT_OLD_PCI_CONFIGURATION) +#define PVSCSI_MSI_OFFSET(s) \ + (PVSCSI_USE_OLD_PCI_CONFIGURATION(s) ? 0x50 : 0x7c) typedef struct PVSCSIRingInfo { uint64_t rs_pa; @@ -1029,7 +1030,7 @@ pvscsi_init_msi(PVSCSIState *s) int res; PCIDevice *d = PCI_DEVICE(s); - res = msi_init(d, PVSCSI_MSI_OFFSET, PVSCSI_MSIX_NUM_VECTORS, + res = msi_init(d, PVSCSI_MSI_OFFSET(s), PVSCSI_MSIX_NUM_VECTORS, PVSCSI_USE_64BIT, PVSCSI_PER_VECTOR_MASK); if (res < 0) { trace_pvscsi_init_msi_fail(res); -- 1.9.1