From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965799AbbLPKLZ (ORCPT ); Wed, 16 Dec 2015 05:11:25 -0500 Received: from mail-pf0-f170.google.com ([209.85.192.170]:35260 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965705AbbLPKKr (ORCPT ); Wed, 16 Dec 2015 05:10:47 -0500 From: Chris Zhong To: heiko@sntech.de, linux-rockchip@lists.infradead.org, mark.yao@rock-chips.com, treding@nvidia.com Cc: Chris Zhong , Russell King , devicetree@vger.kernel.org, Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , Rob Herring , Pawel Moll , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 5/6] ARM: dts: rockchip: add rk3288 mipi_dsi nodes Date: Wed, 16 Dec 2015 18:10:15 +0800 Message-Id: <1450260616-21160-6-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1450260616-21160-1-git-send-email-zyw@rock-chips.com> References: <1450260616-21160-1-git-send-email-zyw@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl output port nodes. Signed-off-by: Chris Zhong --- Changes in v6: None Changes in v5: - modify the clk name to SCLK_MIPIDSI_24M Changes in v4: None Changes in v3: None arch/arm/boot/dts/rk3288.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index a9270f7..1086761 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -817,6 +817,10 @@ reg = <1>; remote-endpoint = <&hdmi_in_vopb>; }; + vopb_out_mipi: endpoint@2 { + reg = <2>; + remote-endpoint = <&mipi_in_vopb>; + }; }; }; @@ -853,6 +857,10 @@ reg = <1>; remote-endpoint = <&hdmi_in_vopl>; }; + vopl_out_mipi: endpoint@2 { + reg = <2>; + remote-endpoint = <&mipi_in_vopl>; + }; }; }; @@ -954,6 +962,37 @@ status = "disabled"; }; + mipi_dsi: mipi@ff960000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0xff960000 0x4000>; + interrupts = ; + clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; + clock-names = "ref", "pclk"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + mipi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_mipi>; + }; + mipi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_mipi>; + }; + }; + }; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; interrupt-controller; -- 2.6.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Zhong Subject: [PATCH v6 5/6] ARM: dts: rockchip: add rk3288 mipi_dsi nodes Date: Wed, 16 Dec 2015 18:10:15 +0800 Message-ID: <1450260616-21160-6-git-send-email-zyw@rock-chips.com> References: <1450260616-21160-1-git-send-email-zyw@rock-chips.com> Return-path: In-Reply-To: <1450260616-21160-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, mark.yao-TNX95d0MmH7DzftRWevZcw@public.gmane.org, treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org Cc: Chris Zhong , Russell King , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Kumar Gala , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Ian Campbell , Rob Herring , Pawel Moll , Mark Rutland , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl output port nodes. Signed-off-by: Chris Zhong --- Changes in v6: None Changes in v5: - modify the clk name to SCLK_MIPIDSI_24M Changes in v4: None Changes in v3: None arch/arm/boot/dts/rk3288.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index a9270f7..1086761 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -817,6 +817,10 @@ reg = <1>; remote-endpoint = <&hdmi_in_vopb>; }; + vopb_out_mipi: endpoint@2 { + reg = <2>; + remote-endpoint = <&mipi_in_vopb>; + }; }; }; @@ -853,6 +857,10 @@ reg = <1>; remote-endpoint = <&hdmi_in_vopl>; }; + vopl_out_mipi: endpoint@2 { + reg = <2>; + remote-endpoint = <&mipi_in_vopl>; + }; }; }; @@ -954,6 +962,37 @@ status = "disabled"; }; + mipi_dsi: mipi@ff960000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0xff960000 0x4000>; + interrupts = ; + clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; + clock-names = "ref", "pclk"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + mipi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_mipi>; + }; + mipi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_mipi>; + }; + }; + }; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; interrupt-controller; -- 2.6.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: zyw@rock-chips.com (Chris Zhong) Date: Wed, 16 Dec 2015 18:10:15 +0800 Subject: [PATCH v6 5/6] ARM: dts: rockchip: add rk3288 mipi_dsi nodes In-Reply-To: <1450260616-21160-1-git-send-email-zyw@rock-chips.com> References: <1450260616-21160-1-git-send-email-zyw@rock-chips.com> Message-ID: <1450260616-21160-6-git-send-email-zyw@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl output port nodes. Signed-off-by: Chris Zhong --- Changes in v6: None Changes in v5: - modify the clk name to SCLK_MIPIDSI_24M Changes in v4: None Changes in v3: None arch/arm/boot/dts/rk3288.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index a9270f7..1086761 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -817,6 +817,10 @@ reg = <1>; remote-endpoint = <&hdmi_in_vopb>; }; + vopb_out_mipi: endpoint at 2 { + reg = <2>; + remote-endpoint = <&mipi_in_vopb>; + }; }; }; @@ -853,6 +857,10 @@ reg = <1>; remote-endpoint = <&hdmi_in_vopl>; }; + vopl_out_mipi: endpoint at 2 { + reg = <2>; + remote-endpoint = <&mipi_in_vopl>; + }; }; }; @@ -954,6 +962,37 @@ status = "disabled"; }; + mipi_dsi: mipi at ff960000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0xff960000 0x4000>; + interrupts = ; + clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; + clock-names = "ref", "pclk"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mipi_in: port { + #address-cells = <1>; + #size-cells = <0>; + mipi_in_vopb: endpoint at 0 { + reg = <0>; + remote-endpoint = <&vopb_out_mipi>; + }; + mipi_in_vopl: endpoint at 1 { + reg = <1>; + remote-endpoint = <&vopl_out_mipi>; + }; + }; + }; + }; + gic: interrupt-controller at ffc01000 { compatible = "arm,gic-400"; interrupt-controller; -- 2.6.3