From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: [PATCH RFC 31/31] tools/libxc: Calculate xstate cpuid leaf from guest information Date: Wed, 16 Dec 2015 21:24:33 +0000 Message-ID: <1450301073-28191-32-git-send-email-andrew.cooper3@citrix.com> References: <1450301073-28191-1-git-send-email-andrew.cooper3@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1450301073-28191-1-git-send-email-andrew.cooper3@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel Cc: Andrew Cooper , Ian Jackson , Ian Campbell , Wei Liu List-Id: xen-devel@lists.xenproject.org It is unsafe to generate the guests xstate leaves from host information, as it prevents the differences between hosts from being hidden. Signed-off-by: Andrew Cooper --- CC: Ian Campbell CC: Ian Jackson CC: Wei Liu --- tools/libxc/xc_cpuid_x86.c | 44 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 34 insertions(+), 10 deletions(-) diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 6c8995f..9c1d30d 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -285,40 +285,64 @@ static void intel_xc_cpuid_policy(xc_interface *xch, } } +#define X86_XCR0_X87 (1ULL << 0) +#define X86_XCR0_SSE (1ULL << 1) +#define X86_XCR0_AVX (1ULL << 2) +#define X86_XCR0_LWP (1ULL << 62) + #define XSAVEOPT (1 << 0) /* Configure extended state enumeration leaves (0x0000000D for xsave) */ static void xc_cpuid_config_xsave(xc_interface *xch, const struct cpuid_domain_info *info, const unsigned int *input, unsigned int *regs) { - if ( info->xfeature_mask == 0 ) + uint64_t guest_xfeature_mask; + + if ( info->xfeature_mask == 0 || + !test_bit(X86_FEATURE_XSAVE, info->featureset) ) { regs[0] = regs[1] = regs[2] = regs[3] = 0; return; } + guest_xfeature_mask = X86_XCR0_SSE | X86_XCR0_X87; + + if ( test_bit(X86_FEATURE_AVX, info->featureset) ) + guest_xfeature_mask |= X86_XCR0_AVX; + + if ( test_bit(X86_FEATURE_LWP, info->featureset) ) + guest_xfeature_mask |= X86_XCR0_LWP; + + /* + * Clamp to host mask. Should be no-op, as guest_xfeature_mask should not + * be able to be calculated as larger than info->xfeature_mask. + * + * TODO - see about making this a harder error. + */ + guest_xfeature_mask &= info->xfeature_mask; + switch ( input[1] ) { - case 0: + case 0: /* EAX: low 32bits of xfeature_enabled_mask */ - regs[0] = info->xfeature_mask & 0xFFFFFFFF; + regs[0] = guest_xfeature_mask & 0xFFFFFFFF; /* EDX: high 32bits of xfeature_enabled_mask */ - regs[3] = (info->xfeature_mask >> 32) & 0xFFFFFFFF; + regs[3] = (guest_xfeature_mask >> 32) & 0xFFFFFFFF; /* ECX: max size required by all HW features */ { unsigned int _input[2] = {0xd, 0x0}, _regs[4]; regs[2] = 0; - for ( _input[1] = 2; _input[1] < 64; _input[1]++ ) + for ( _input[1] = 2; _input[1] <= 62; _input[1]++ ) { cpuid(_input, _regs); if ( (_regs[0] + _regs[1]) > regs[2] ) regs[2] = _regs[0] + _regs[1]; } } - /* EBX: max size required by enabled features. - * This register contains a dynamic value, which varies when a guest - * enables or disables XSTATE features (via xsetbv). The default size - * after reset is 576. */ + /* EBX: max size required by enabled features. + * This register contains a dynamic value, which varies when a guest + * enables or disables XSTATE features (via xsetbv). The default size + * after reset is 576. */ regs[1] = 512 + 64; /* FP/SSE + XSAVE.HEADER */ break; case 1: /* leaf 1 */ @@ -326,7 +350,7 @@ static void xc_cpuid_config_xsave(xc_interface *xch, regs[1] = regs[2] = regs[3] = 0; break; case 2 ... 63: /* sub-leaves */ - if ( !(info->xfeature_mask & (1ULL << input[1])) ) + if ( !(guest_xfeature_mask & (1ULL << input[1])) ) { regs[0] = regs[1] = regs[2] = regs[3] = 0; break; -- 2.1.4