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From: Suresh Warrier <warrier@linux.vnet.ibm.com>
To: kvm@vger.kernel.org, linuxppc-dev@ozlabs.org
Cc: warrier@linux.vnet.ibm.com, paulus@samba.org, agraf@suse.de,
	mpe@ellerman.id.au
Subject: [PATCH v3 3/9] powerpc/xics: Add icp_native_cause_ipi_rm
Date: Thu, 17 Dec 2015 14:59:05 -0600	[thread overview]
Message-ID: <1450385951-25128-4-git-send-email-warrier@linux.vnet.ibm.com> (raw)
In-Reply-To: <1450385951-25128-1-git-send-email-warrier@linux.vnet.ibm.com>

Function to cause an IPI by directly updating the MFFR register
in the XICS. The function is meant for real-mode callers since
they cannot use the smp_ops->cause_ipi function which uses an
ioremapped address.

Normal usage is for the the KVM real mode code to set the IPI message
using smp_muxed_ipi_message_pass and then invoke icp_native_cause_ipi_rm
to cause the actual IPI.

The function requires kvm_hstate.xics_phys to have been initialized
with the physical address of XICS.

Signed-off-by: Suresh Warrier <warrier@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/xics.h       |  1 +
 arch/powerpc/sysdev/xics/icp-native.c | 21 +++++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
index 0e25bdb..2546048 100644
--- a/arch/powerpc/include/asm/xics.h
+++ b/arch/powerpc/include/asm/xics.h
@@ -30,6 +30,7 @@
 #ifdef CONFIG_PPC_ICP_NATIVE
 extern int icp_native_init(void);
 extern void icp_native_flush_interrupt(void);
+extern void icp_native_cause_ipi_rm(int cpu);
 #else
 static inline int icp_native_init(void) { return -ENODEV; }
 #endif
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c
index eae3265..afdf62f 100644
--- a/arch/powerpc/sysdev/xics/icp-native.c
+++ b/arch/powerpc/sysdev/xics/icp-native.c
@@ -159,6 +159,27 @@ static void icp_native_cause_ipi(int cpu, unsigned long data)
 	icp_native_set_qirr(cpu, IPI_PRIORITY);
 }
 
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+void icp_native_cause_ipi_rm(int cpu)
+{
+	/*
+	 * Currently not used to send IPIs to another CPU
+	 * on the same core. Only caller is KVM real mode.
+	 * Need the physical address of the XICS to be
+	 * previously saved in kvm_hstate in the paca.
+	 */
+	unsigned long xics_phys;
+
+	/*
+	 * Just like the cause_ipi functions, it is required to
+	 * include a full barrier (out8 includes a sync) before
+	 * causing the IPI.
+	 */
+	xics_phys = paca[cpu].kvm_hstate.xics_phys;
+	out_rm8((u8 *)(xics_phys + XICS_MFRR), IPI_PRIORITY);
+}
+#endif
+
 /*
  * Called when an interrupt is received on an off-line CPU to
  * clear the interrupt, so that the CPU can go back to nap mode.
-- 
1.8.3.4


  parent reply	other threads:[~2015-12-17 20:59 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-17 20:59 [PATCH v3 0/9] KVM: PPC: Book3S HV: Optimize wakeup VCPU from H_IPI Suresh Warrier
2015-12-17 20:59 ` [PATCH v3 1/9] powerpc/smp: Support more IPI messages Suresh Warrier
2015-12-17 20:59 ` [PATCH v3 2/9] powerpc/smp: Add smp_muxed_ipi_set_message Suresh Warrier
2015-12-17 20:59 ` Suresh Warrier [this message]
2015-12-17 20:59 ` [PATCH v3 4/9] KVM: PPC: Book3S HV: Host-side RM data structures Suresh Warrier
2015-12-17 20:59 ` [PATCH v3 5/9] KVM: PPC: Book3S HV: Manage core host state Suresh Warrier
2015-12-17 20:59 ` [PATCH v3 6/9] KVM: PPC: Book3S HV: kvmppc_host_rm_ops - handle offlining CPUs Suresh Warrier
2015-12-17 20:59 ` [PATCH v3 7/9] KVM: PPC: Book3S HV: Host side kick VCPU when poked by real-mode KVM Suresh Warrier
2015-12-17 20:59 ` [PATCH v3 8/9] KVM: PPC: Book3S HV: Send IPI to host core to wake VCPU Suresh Warrier
2015-12-21 22:22   ` Suresh E. Warrier
2015-12-17 20:59 ` [PATCH v3 9/9] KVM: PPC: Book3S HV: Add tunable to control H_IPI redirection Suresh Warrier
2015-12-21 22:33   ` Suresh E. Warrier

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