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From: David Gibson <david@gibson.dropbear.id.au>
To: aik@ozlabs.ru, benh@kernel.crashing.org, mdroth@linux.vnet.ibm.com
Cc: lvivier@redhat.com, thuth@redhat.com, agraf@suse.de,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 2/2] ppc: Allow 64kiB pages for POWER8 in TCG
Date: Mon, 21 Dec 2015 13:41:10 +1100	[thread overview]
Message-ID: <1450665670-18323-3-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1450665670-18323-1-git-send-email-david@gibson.dropbear.id.au>

Now that the spapr code has been extended to support 64kiB pages, we can
allow guests to use 64kiB pages on an emulated POWER8 by adding it to the
"segment_page_sizes" structure which is advertised via the device tree.

For now we just add support for 64kiB pages in 64kiB page segments.  Real
POWER8 also supports 64kiB pages in 4kiB page segments, but that will
require more work to implement.

Real POWER7s (and maybe some other CPU models) also support 64kiB pages,
however, I don't want to add support there without double checking if they
use the same HPTE and SLB encodings (in principle these are implementation
dependent).

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target-ppc/translate_init.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index e88dc7f..ae5a269 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8200,6 +8200,22 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
     PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+    static const struct ppc_segment_page_sizes POWER8_sps = {
+        .sps = {
+            { .page_shift = 12, /* 4K */
+              .slb_enc = 0,
+              .enc = { { .page_shift = 12, .pte_enc = 0 } }
+            },
+            { .page_shift = 16, /* 64K */
+              .slb_enc = 0x110,
+              .enc = { { .page_shift = 16, .pte_enc = 0x1 } }
+            },
+            { .page_shift = 24, /* 16M */
+              .slb_enc = 0x100,
+              .enc = { { .page_shift = 24, .pte_enc = 0 } }
+            },
+        }
+    };
 
     dc->fw_name = "PowerPC,POWER8";
     dc->desc = "POWER8";
@@ -8258,6 +8274,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
     pcc->l1_dcache_size = 0x8000;
     pcc->l1_icache_size = 0x8000;
     pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_lpcr;
+    pcc->sps = &POWER8_sps;
 }
 #endif /* defined (TARGET_PPC64) */
 
-- 
2.5.0

  parent reply	other threads:[~2015-12-21  2:40 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-21  2:41 [Qemu-devel] [PATCH 0/2] 64kiB page support for TCG guests with POWER8 CPU David Gibson
2015-12-21  2:41 ` [Qemu-devel] [PATCH 1/2] ppc: Move HPTE size parsing code to target-ppc helper (and add 64kiB pages) David Gibson
2016-01-08  3:31   ` Alexey Kardashevskiy
2015-12-21  2:41 ` David Gibson [this message]
2015-12-21  2:49   ` [Qemu-devel] [PATCH 2/2] ppc: Allow 64kiB pages for POWER8 in TCG Benjamin Herrenschmidt
2016-01-08  3:56   ` Alexey Kardashevskiy
2016-01-12  0:26     ` David Gibson
2016-01-12  4:30       ` Alexey Kardashevskiy
2016-01-12  4:33         ` David Gibson
2016-01-12  5:39           ` Alexey Kardashevskiy

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