From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753463AbbL2Nf2 (ORCPT ); Tue, 29 Dec 2015 08:35:28 -0500 Received: from mail-yk0-f196.google.com ([209.85.160.196]:36503 "EHLO mail-yk0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752049AbbL2NfX (ORCPT ); Tue, 29 Dec 2015 08:35:23 -0500 From: Rongrong Zou To: arnd@arndb.de, catalin.marinas@arm.com, will.deacon@arm.com Cc: benh@kernel.crashing.org, lijianhua@huawei.com, lixiancai@huawei.com, linuxarm@huawei.com, linux-kernel@vger.kernel.org, minyard@acm.org, gregkh@linuxfoundation.org Subject: [PATCH v1 3/3] ARM64 LPC: update binding doc Date: Tue, 29 Dec 2015 21:33:52 +0800 Message-Id: <1451396032-23708-4-git-send-email-zourongrong@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1451396032-23708-1-git-send-email-zourongrong@gmail.com> References: <1451396032-23708-1-git-send-email-zourongrong@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Rongrong Zou --- .../devicetree/bindings/arm64/low-pin-count.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm64/low-pin-count.txt diff --git a/Documentation/devicetree/bindings/arm64/low-pin-count.txt b/Documentation/devicetree/bindings/arm64/low-pin-count.txt new file mode 100644 index 0000000..215f2c4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm64/low-pin-count.txt @@ -0,0 +1,20 @@ +Low Pin Count bus driver + +Usually LPC controller is part of PCI host bridge, so the legacy ISA +port locate on LPC bus can be accessed directly. But some SoC have +independent LPC controller, and we can access the legacy port by specifying +LPC address cycle. Thus, LPC driver is introduced. + +Required properties: +- compatible: "low-pin-count" +- reg: specifies low pin count address range + + +Example: + + lpc_0: lpc@a01b0000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "low-pin-count"; + reg = <0x0 0xa01b0000 0x0 0x10000>; + }; -- 1.9.1