From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753572AbcAEUbx (ORCPT ); Tue, 5 Jan 2016 15:31:53 -0500 Received: from youngberry.canonical.com ([91.189.89.112]:44901 "EHLO youngberry.canonical.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753072AbcAETrL (ORCPT ); Tue, 5 Jan 2016 14:47:11 -0500 From: Kamal Mostafa To: linux-kernel@vger.kernel.org, stable@vger.kernel.org, kernel-team@lists.ubuntu.com Cc: Takashi Iwai , Kamal Mostafa Subject: [PATCH 4.2.y-ckt 074/211] ALSA: hda - Fix lost 4k BDL boundary workaround Date: Tue, 5 Jan 2016 11:43:02 -0800 Message-Id: <1452023119-25647-75-git-send-email-kamal@canonical.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1452023119-25647-1-git-send-email-kamal@canonical.com> References: <1452023119-25647-1-git-send-email-kamal@canonical.com> X-Extended-Stable: 4.2 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4.2.8-ckt1 -stable review patch. If anyone has any objections, please let me know. ------------------ From: Takashi Iwai commit de1ab6af5c3d92c0a031083962a7ff270cf301b7 upstream. During the migration to HDA core code, we lost the workaround for 4k BDL boundary. The flag exists in the new hdac_bus, but it's never set. This resulted in the sudden sound stall on some controllers that require this workaround like Creative Recon3D. This patch fixes the issue by setting the flag for such controllers properly. Fixes: ccc98865aa44 ('ALSA: hda - Migrate more hdac_stream codes') Signed-off-by: Takashi Iwai Signed-off-by: Kamal Mostafa --- sound/pci/hda/hda_controller.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c index 9444559..4013af3 100644 --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -1059,6 +1059,9 @@ int azx_bus_init(struct azx *chip, const char *model, bus->needs_damn_long_delay = 1; } + if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY) + bus->core.align_bdle_4k = true; + /* AMD chipsets often cause the communication stalls upon certain * sequence like the pin-detection. It seems that forcing the synced * access works around the stall. Grrr... -- 1.9.1