From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f45.google.com ([74.125.82.45]:34611 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752720AbcAGJLC (ORCPT ); Thu, 7 Jan 2016 04:11:02 -0500 Received: by mail-wm0-f45.google.com with SMTP id u188so89815063wmu.1 for ; Thu, 07 Jan 2016 01:11:01 -0800 (PST) From: Daniel Vetter To: DRI Development Cc: Intel Graphics Development , Daniel Vetter , =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= , Patrik Jakobsson , Imre Deak , Jani Nikula , Meelis Roos , stable@vger.kernel.org, Daniel Vetter Subject: [PATCH] drm/i915: Init power domains early in driver load Date: Thu, 7 Jan 2016 10:10:56 +0100 Message-Id: <1452157856-27360-1-git-send-email-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: Since commit ac9b8236551d1177fd07b56aef9b565d1864420d Author: Ville Syrjälä Date: Fri Nov 27 18:55:26 2015 +0200 drm/i915: Introduce a gmbus power domain gmbus also needs the power domain infrastructure right from the start, since as soon as we register the i2c controllers someone can use them. Cc: Ville Syrjälä Cc: Patrik Jakobsson Cc: Imre Deak Cc: Jani Nikula Cc: Meelis Roos Fixes: ac9b8236551d ("drm/i915: Introduce a gmbus power domain") Cc: stable@vger.kernel.org References: http://www.spinics.net/lists/intel-gfx/msg83075.html Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_dma.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index b4741d121a74..405aba2ca736 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -396,8 +396,6 @@ static int i915_load_modeset_init(struct drm_device *dev) if (ret) goto cleanup_vga_switcheroo; - intel_power_domains_init_hw(dev_priv); - ret = intel_irq_install(dev_priv); if (ret) goto cleanup_gem_stolen; @@ -1025,6 +1023,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) intel_irq_init(dev_priv); intel_uncore_sanitize(dev); + intel_power_domains_init(dev_priv); + intel_power_domains_init_hw(dev_priv); /* Try to make sure MCHBAR is enabled before poking at it */ intel_setup_mchbar(dev); @@ -1057,8 +1057,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) goto out_gem_unload; } - intel_power_domains_init(dev_priv); - ret = i915_load_modeset_init(dev); if (ret < 0) { DRM_ERROR("failed to init modeset\n"); -- 2.6.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PATCH] drm/i915: Init power domains early in driver load Date: Thu, 7 Jan 2016 10:10:56 +0100 Message-ID: <1452157856-27360-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-wm0-f53.google.com (mail-wm0-f53.google.com [74.125.82.53]) by gabe.freedesktop.org (Postfix) with ESMTPS id A89356E63F for ; Thu, 7 Jan 2016 01:11:02 -0800 (PST) Received: by mail-wm0-f53.google.com with SMTP id l65so88518032wmf.1 for ; Thu, 07 Jan 2016 01:11:02 -0800 (PST) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: DRI Development Cc: Meelis Roos , Jani Nikula , Daniel Vetter , Intel Graphics Development , stable@vger.kernel.org, Daniel Vetter List-Id: dri-devel@lists.freedesktop.org U2luY2UKCmNvbW1pdCBhYzliODIzNjU1MWQxMTc3ZmQwN2I1NmFlZjliNTY1ZDE4NjQ0MjBkCkF1 dGhvcjogVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5zeXJqYWxhQGxpbnV4LmludGVsLmNvbT4KRGF0 ZTogICBGcmkgTm92IDI3IDE4OjU1OjI2IDIwMTUgKzAyMDAKCiAgICBkcm0vaTkxNTogSW50cm9k dWNlIGEgZ21idXMgcG93ZXIgZG9tYWluCgpnbWJ1cyBhbHNvIG5lZWRzIHRoZSBwb3dlciBkb21h aW4gaW5mcmFzdHJ1Y3R1cmUgcmlnaHQgZnJvbSB0aGUgc3RhcnQsCnNpbmNlIGFzIHNvb24gYXMg d2UgcmVnaXN0ZXIgdGhlIGkyYyBjb250cm9sbGVycyBzb21lb25lIGNhbiB1c2UgdGhlbS4KCkNj OiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxlLnN5cmphbGFAbGludXguaW50ZWwuY29tPgpDYzogUGF0 cmlrIEpha29ic3NvbiA8cGF0cmlrLmpha29ic3NvbkBsaW51eC5pbnRlbC5jb20+CkNjOiBJbXJl IERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+CkNjOiBKYW5pIE5pa3VsYSA8amFuaS5uaWt1bGFA aW50ZWwuY29tPgpDYzogTWVlbGlzIFJvb3MgPG1yb29zQGxpbnV4LmVlPgpGaXhlczogYWM5Yjgy MzY1NTFkICgiZHJtL2k5MTU6IEludHJvZHVjZSBhIGdtYnVzIHBvd2VyIGRvbWFpbiIpCkNjOiBz dGFibGVAdmdlci5rZXJuZWwub3JnClJlZmVyZW5jZXM6IGh0dHA6Ly93d3cuc3Bpbmljcy5uZXQv bGlzdHMvaW50ZWwtZ2Z4L21zZzgzMDc1Lmh0bWwKU2lnbmVkLW9mZi1ieTogRGFuaWVsIFZldHRl ciA8ZGFuaWVsLnZldHRlckBpbnRlbC5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkx NV9kbWEuYyB8IDYgKystLS0tCiAxIGZpbGUgY2hhbmdlZCwgMiBpbnNlcnRpb25zKCspLCA0IGRl bGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZG1hLmMg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2RtYS5jCmluZGV4IGI0NzQxZDEyMWE3NC4uNDA1 YWJhMmNhNzM2IDEwMDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2RtYS5jCisr KyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZG1hLmMKQEAgLTM5Niw4ICszOTYsNiBAQCBz dGF0aWMgaW50IGk5MTVfbG9hZF9tb2Rlc2V0X2luaXQoc3RydWN0IGRybV9kZXZpY2UgKmRldikK IAlpZiAocmV0KQogCQlnb3RvIGNsZWFudXBfdmdhX3N3aXRjaGVyb287CiAKLQlpbnRlbF9wb3dl cl9kb21haW5zX2luaXRfaHcoZGV2X3ByaXYpOwotCiAJcmV0ID0gaW50ZWxfaXJxX2luc3RhbGwo ZGV2X3ByaXYpOwogCWlmIChyZXQpCiAJCWdvdG8gY2xlYW51cF9nZW1fc3RvbGVuOwpAQCAtMTAy NSw2ICsxMDIzLDggQEAgaW50IGk5MTVfZHJpdmVyX2xvYWQoc3RydWN0IGRybV9kZXZpY2UgKmRl diwgdW5zaWduZWQgbG9uZyBmbGFncykKIAogCWludGVsX2lycV9pbml0KGRldl9wcml2KTsKIAlp bnRlbF91bmNvcmVfc2FuaXRpemUoZGV2KTsKKwlpbnRlbF9wb3dlcl9kb21haW5zX2luaXQoZGV2 X3ByaXYpOworCWludGVsX3Bvd2VyX2RvbWFpbnNfaW5pdF9odyhkZXZfcHJpdik7CiAKIAkvKiBU cnkgdG8gbWFrZSBzdXJlIE1DSEJBUiBpcyBlbmFibGVkIGJlZm9yZSBwb2tpbmcgYXQgaXQgKi8K IAlpbnRlbF9zZXR1cF9tY2hiYXIoZGV2KTsKQEAgLTEwNTcsOCArMTA1Nyw2IEBAIGludCBpOTE1 X2RyaXZlcl9sb2FkKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYsIHVuc2lnbmVkIGxvbmcgZmxhZ3Mp CiAJCQlnb3RvIG91dF9nZW1fdW5sb2FkOwogCX0KIAotCWludGVsX3Bvd2VyX2RvbWFpbnNfaW5p dChkZXZfcHJpdik7Ci0KIAlyZXQgPSBpOTE1X2xvYWRfbW9kZXNldF9pbml0KGRldik7CiAJaWYg KHJldCA8IDApIHsKIAkJRFJNX0VSUk9SKCJmYWlsZWQgdG8gaW5pdCBtb2Rlc2V0XG4iKTsKLS0g CjIuNi40CgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpk cmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0 cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo=