From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753752AbcAMDBz (ORCPT ); Tue, 12 Jan 2016 22:01:55 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:28445 "EHLO mailgw02.hq.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751568AbcAMDBx (ORCPT ); Tue, 12 Jan 2016 22:01:53 -0500 Message-ID: <1452654106.2657.0.camel@mtksdaap41> Subject: Re: [PATCH v3 0/6] Add clock support for Mediatek MT2701 From: James Liao To: John Crispin CC: Matthias Brugger , Mike Turquette , Stephen Boyd , , Sascha Hauer , , , , Philipp Zabel , , Date: Wed, 13 Jan 2016 11:01:46 +0800 In-Reply-To: <5694D106.2030009@openwrt.org> References: <1452587470-61506-1-git-send-email-jamesjj.liao@mediatek.com> <5694D106.2030009@openwrt.org> Content-Type: text/plain; charset="us-ascii" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi John, On Tue, 2016-01-12 at 11:10 +0100, John Crispin wrote: > Hi James, > > On 12/01/2016 09:31, James Liao wrote: > > This patchset is based on 4.4-rc7, add clock and reset controller support > > for Mediatek MT2701. > > > > This patchset also refined makefile and Kconfig to support configurable > > multiple SoC clock support. > > > > changes since v2: > > - Fix ethsys definition. > > - Replace read-modify-write with regmap_update_bits() in clock operations. > > - Move mt2701-resets.h to include/dt-bindings/reset/. > > - Add hifsys reset patch from John Crispin. > > thanks for folding the fixup. > > i have been testing your V2 on MT7623 for several days now and updated > to V3 this morning which works just as well. feel free to add > > Tested-by: John Crispin Thanks for your help. Best regards, James From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Liao Subject: Re: [PATCH v3 0/6] Add clock support for Mediatek MT2701 Date: Wed, 13 Jan 2016 11:01:46 +0800 Message-ID: <1452654106.2657.0.camel@mtksdaap41> References: <1452587470-61506-1-git-send-email-jamesjj.liao@mediatek.com> <5694D106.2030009@openwrt.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <5694D106.2030009@openwrt.org> Sender: linux-clk-owner@vger.kernel.org To: John Crispin Cc: Matthias Brugger , Mike Turquette , Stephen Boyd , devicetree@vger.kernel.org, Sascha Hauer , srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Philipp Zabel , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Hi John, On Tue, 2016-01-12 at 11:10 +0100, John Crispin wrote: > Hi James, > > On 12/01/2016 09:31, James Liao wrote: > > This patchset is based on 4.4-rc7, add clock and reset controller support > > for Mediatek MT2701. > > > > This patchset also refined makefile and Kconfig to support configurable > > multiple SoC clock support. > > > > changes since v2: > > - Fix ethsys definition. > > - Replace read-modify-write with regmap_update_bits() in clock operations. > > - Move mt2701-resets.h to include/dt-bindings/reset/. > > - Add hifsys reset patch from John Crispin. > > thanks for folding the fixup. > > i have been testing your V2 on MT7623 for several days now and updated > to V3 this morning which works just as well. feel free to add > > Tested-by: John Crispin Thanks for your help. Best regards, James From mboxrd@z Thu Jan 1 00:00:00 1970 From: jamesjj.liao@mediatek.com (James Liao) Date: Wed, 13 Jan 2016 11:01:46 +0800 Subject: [PATCH v3 0/6] Add clock support for Mediatek MT2701 In-Reply-To: <5694D106.2030009@openwrt.org> References: <1452587470-61506-1-git-send-email-jamesjj.liao@mediatek.com> <5694D106.2030009@openwrt.org> Message-ID: <1452654106.2657.0.camel@mtksdaap41> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi John, On Tue, 2016-01-12 at 11:10 +0100, John Crispin wrote: > Hi James, > > On 12/01/2016 09:31, James Liao wrote: > > This patchset is based on 4.4-rc7, add clock and reset controller support > > for Mediatek MT2701. > > > > This patchset also refined makefile and Kconfig to support configurable > > multiple SoC clock support. > > > > changes since v2: > > - Fix ethsys definition. > > - Replace read-modify-write with regmap_update_bits() in clock operations. > > - Move mt2701-resets.h to include/dt-bindings/reset/. > > - Add hifsys reset patch from John Crispin. > > thanks for folding the fixup. > > i have been testing your V2 on MT7623 for several days now and updated > to V3 this morning which works just as well. feel free to add > > Tested-by: John Crispin Thanks for your help. Best regards, James