From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/3] misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
Date: Mon, 18 Jan 2016 10:56:56 +0100 [thread overview]
Message-ID: <1453111018-27744-1-git-send-email-sr@denx.de> (raw)
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
---
drivers/misc/Kconfig | 7 +++++++
drivers/misc/Makefile | 1 +
drivers/misc/winbond_w83627.c | 41 +++++++++++++++++++++++++++++++++++++++++
include/winbond_w83627.h | 35 +++++++++++++++++++++++++++++++++++
4 files changed, 84 insertions(+)
create mode 100644 drivers/misc/winbond_w83627.c
create mode 100644 include/winbond_w83627.h
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index b92da4e..e024fa7 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -112,4 +112,11 @@ config RESET
effect a reset. The uclass will try all available drivers when
reset_walk() is called.
+config WINBOND_W83627
+ bool "Enable Winbond legacy UART driver"
+ help
+ If you say Y here, you will get support for the Winbond
+ W83627 legacy UART driver. This can be used to enable the
+ legacy UART in the Winbond Super IO chips on X86 platforms.
+
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index aa137f5..15505bf 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -38,3 +38,4 @@ obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
obj-$(CONFIG_RESET) += reset-uclass.o
obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
+obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
diff --git a/drivers/misc/winbond_w83627.c b/drivers/misc/winbond_w83627.c
new file mode 100644
index 0000000..7c6a033
--- /dev/null
+++ b/drivers/misc/winbond_w83627.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/pnp_def.h>
+
+#define WINBOND_ENTRY_KEY 0x87
+#define WINBOND_EXIT_KEY 0xAA
+
+/* Enable configuration: pass entry key '0x87' into index port dev. */
+static void pnp_enter_conf_state(u16 dev)
+{
+ u16 port = dev >> 8;
+
+ outb(WINBOND_ENTRY_KEY, port);
+ outb(WINBOND_ENTRY_KEY, port);
+}
+
+/* Disable configuration: pass exit key '0xAA' into index port dev. */
+static void pnp_exit_conf_state(u16 dev)
+{
+ u16 port = dev >> 8;
+
+ outb(WINBOND_EXIT_KEY, port);
+}
+
+/* Bring up early serial debugging output before the RAM is initialized. */
+void winbond_enable_serial(uint dev, uint iobase, uint irq)
+{
+ pnp_enter_conf_state(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
+ pnp_set_enable(dev, 1);
+ pnp_exit_conf_state(dev);
+}
diff --git a/include/winbond_w83627.h b/include/winbond_w83627.h
new file mode 100644
index 0000000..ac3bec6
--- /dev/null
+++ b/include/winbond_w83627.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _WINBOND_W83627_H_
+#define _WINBOND_W83627_H_
+
+/* I/O address of Winbond Super IO chip */
+#define WINBOND_IO_PORT 0x2e
+
+/* Logical device number */
+#define W83627DHG_FDC 0 /* Floppy */
+#define W83627DHG_PP 1 /* Parallel port */
+#define W83627DHG_SP1 2 /* Com1 */
+#define W83627DHG_SP2 3 /* Com2 */
+#define W83627DHG_KBC 5 /* PS/2 keyboard & mouse */
+#define W83627DHG_SPI 6 /* Serial peripheral interface */
+#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
+#define W83627DHG_ACPI 10 /* ACPI */
+#define W83627DHG_HWM 11 /* Hardware monitor */
+#define W83627DHG_PECI_SST 12 /* PECI, SST */
+
+/**
+ * Configure the base I/O port of the specified serial device and enable the
+ * serial device.
+ *
+ * @dev: high 8 bits = super I/O port, low 8 bits = logical device number
+ * @iobase: processor I/O port address to assign to this serial device
+ * @irq: processor IRQ number to assign to this serial device
+ */
+void winbond_enable_serial(uint dev, uint iobase, uint irq);
+
+#endif /* _WINBOND_W83627_H_ */
--
2.6.5
next reply other threads:[~2016-01-18 9:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-18 9:56 Stefan Roese [this message]
2016-01-18 9:56 ` [U-Boot] [PATCH 2/3] x86: BayTrail: Add function to disable the internal legacy UART Stefan Roese
2016-01-19 8:40 ` Bin Meng
2016-01-19 8:44 ` Bin Meng
2016-01-19 8:51 ` Stefan Roese
2016-01-19 9:29 ` Stefan Roese
2016-01-19 10:15 ` Bin Meng
2016-01-19 10:54 ` Stefan Roese
2016-01-19 11:02 ` Bin Meng
2016-01-19 13:06 ` Stefan Roese
2016-01-18 9:56 ` [U-Boot] [PATCH 3/3] x86: fsp: Disable legacy internal UART if necessary Stefan Roese
2016-01-19 8:40 ` Bin Meng
2016-01-19 9:21 ` Stefan Roese
2016-01-19 8:40 ` [U-Boot] [PATCH 1/3] misc: Add simple driver to enable the legacy UART on Winbond Super IO chips Bin Meng
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