From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Ni Subject: [PATCH V4 10/11] arm64: tegra: add soctherm node for Tegra210 Date: Mon, 25 Jan 2016 18:47:10 +0800 Message-ID: <1453718830-4524-1-git-send-email-wni@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-kernel-owner@vger.kernel.org To: thierry.reding@gmail.com, rui.zhang@intel.com Cc: MLongnecker@nvidia.com, swarren@wwwdotorg.org, mikko.perttunen@kapsi.fi, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Wei Ni List-Id: linux-tegra@vger.kernel.org Adds soctherm node for Tegra210, and add cpu, gpu, mem, pllx as thermal-zones. Signed-off-by: Wei Ni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 53 ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index bc23f4dea002..27cdd623276c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra210"; @@ -802,4 +803,56 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; }; + + soctherm: thermal-sensor@0,700e2000 { + compatible = "nvidia,tegra210-soctherm"; + reg = <0x0 0x700e2000 0x0 0x1000>; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, + <&tegra_car TEGRA210_CLK_SOC_THERM>; + clock-names = "tsensor", "soctherm"; + resets = <&tegra_car 78>; + reset-names = "soctherm"; + #thermal-sensor-cells = <1>; + + hw-trip-points { + cpu { + thermtrip-temperature = <102500>; + }; + gpu { + thermtrip-temperature = <103000>; + }; + }; + }; + + thermal-zones { + cpu { + polling-delay-passive = <1000>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + }; + mem { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + }; + gpu { + polling-delay-passive = <1000>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + }; + pllx { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + }; + }; }; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756559AbcAYKqU (ORCPT ); Mon, 25 Jan 2016 05:46:20 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:7946 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756313AbcAYKqO (ORCPT ); Mon, 25 Jan 2016 05:46:14 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 25 Jan 2016 02:47:08 -0800 From: Wei Ni To: , CC: , , , , , Wei Ni Subject: [PATCH V4 10/11] arm64: tegra: add soctherm node for Tegra210 Date: Mon, 25 Jan 2016 18:47:10 +0800 Message-ID: <1453718830-4524-1-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.19.224.146] X-ClientProxiedBy: DRBGMAIL101.nvidia.com (10.18.16.20) To HKMAIL101.nvidia.com (10.18.16.10) Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Adds soctherm node for Tegra210, and add cpu, gpu, mem, pllx as thermal-zones. Signed-off-by: Wei Ni --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 53 ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index bc23f4dea002..27cdd623276c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -3,6 +3,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra210"; @@ -802,4 +803,56 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; }; + + soctherm: thermal-sensor@0,700e2000 { + compatible = "nvidia,tegra210-soctherm"; + reg = <0x0 0x700e2000 0x0 0x1000>; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_TSENSOR>, + <&tegra_car TEGRA210_CLK_SOC_THERM>; + clock-names = "tsensor", "soctherm"; + resets = <&tegra_car 78>; + reset-names = "soctherm"; + #thermal-sensor-cells = <1>; + + hw-trip-points { + cpu { + thermtrip-temperature = <102500>; + }; + gpu { + thermtrip-temperature = <103000>; + }; + }; + }; + + thermal-zones { + cpu { + polling-delay-passive = <1000>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + }; + mem { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + }; + gpu { + polling-delay-passive = <1000>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + }; + pllx { + polling-delay-passive = <0>; + polling-delay = <0>; + + thermal-sensors = + <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + }; + }; }; -- 1.9.1