From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934079AbcAYTn3 (ORCPT ); Mon, 25 Jan 2016 14:43:29 -0500 Received: from mail.skyhub.de ([78.46.96.112]:33189 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933403AbcAYTl4 (ORCPT ); Mon, 25 Jan 2016 14:41:56 -0500 From: Borislav Petkov To: Ingo Molnar Cc: LKML Subject: [PATCH 5/8] x86/mce/AMD: Reduce number of blocks scanned per bank Date: Mon, 25 Jan 2016 20:41:50 +0100 Message-Id: <1453750913-4781-6-git-send-email-bp@alien8.de> X-Mailer: git-send-email 2.3.5 In-Reply-To: <1453750913-4781-1-git-send-email-bp@alien8.de> References: <1453750913-4781-1-git-send-email-bp@alien8.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Aravind Gopalakrishnan >>From Fam17h onwards, the number of extended MCx_MISC register blocks is reduced to 4. It is an architectural change from what we had on earlier processors. Although theoritically the total number of extended MCx_MISC registers was 8 in earlier processor families, in practice we only had to use the extra registers for MC4. And only 2 of those were used. So this change does not affect older processors. Tested on Fam10h and Fam15h systems. Signed-off-by: Aravind Gopalakrishnan Cc: linux-edac Cc: Tony Luck Cc: x86-ml Link: http://lkml.kernel.org/r/1452901836-27632-4-git-send-email-Aravind.Gopalakrishnan@amd.com Signed-off-by: Borislav Petkov --- arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 3068ce25dfa1..5982227990c9 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -28,7 +28,7 @@ #include #include -#define NR_BLOCKS 9 +#define NR_BLOCKS 5 #define THRESHOLD_MAX 0xFFF #define INT_TYPE_APIC 0x00020000 #define MASK_VALID_HI 0x80000000 -- 2.3.5