From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753966AbcA0HVq (ORCPT ); Wed, 27 Jan 2016 02:21:46 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:41753 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753552AbcA0HVN (ORCPT ); Wed, 27 Jan 2016 02:21:13 -0500 From: James Liao To: Matthias Brugger , Mike Turquette , Stephen Boyd , Rob Herring CC: John Crispin , Sascha Hauer , Daniel Kurtz , Philipp Zabel , , , , , , Subject: [PATCH v5 0/6] Add clock support for Mediatek MT2701 Date: Wed, 27 Jan 2016 15:20:58 +0800 Message-ID: <1453879264-37915-1-git-send-email-jamesjj.liao@mediatek.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series is based on 4.5-rc1, add clock and reset controller support for Mediatek MT2701. This series also refined makefile and Kconfig to support configurable multiple SoC clock support. changes since v4: - Rebase to v4.5-rc1. - Remove CLK_SET_RATE_PARENT from divider flags. - Add img_jpgdec_smi clock. - Move clk/mediatek/Kconfig into menu section in clk/Kconfig. changes since v3: - Change the parent of mm_mdp_bls_26m from clk26m to pwm_sel. changes since v2: - Fix ethsys definition. - Replace read-modify-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine the makefile to support multiple clock drivers dt-bindings: ARM: Mediatek: Document bindings for MT2701 Shunli Wang (4): clk: mediatek: Add dt-bindings for MT2701 clocks clk: mediatek: Add MT2701 clock support reset: mediatek: Add MT2701 reset controller dt-binding file reset: mediatek: Add MT2701 reset driver .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,bdpsys.txt | 22 + .../bindings/arm/mediatek/mediatek,ethsys.txt | 22 + .../bindings/arm/mediatek/mediatek,hifsys.txt | 22 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 + .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,pericfg.txt | 1 + .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 31 + drivers/clk/mediatek/Makefile | 7 +- drivers/clk/mediatek/clk-gate.c | 52 + drivers/clk/mediatek/clk-gate.h | 2 + drivers/clk/mediatek/clk-mt2701.c | 1217 ++++++++++++++++++++ drivers/clk/mediatek/clk-mtk.c | 25 + drivers/clk/mediatek/clk-mtk.h | 34 +- include/dt-bindings/clock/mt2701-clk.h | 482 ++++++++ include/dt-bindings/reset/mt2701-resets.h | 83 ++ 20 files changed, 2001 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt create mode 100644 drivers/clk/mediatek/Kconfig create mode 100644 drivers/clk/mediatek/clk-mt2701.c create mode 100644 include/dt-bindings/clock/mt2701-clk.h create mode 100644 include/dt-bindings/reset/mt2701-resets.h -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Liao Subject: [PATCH v5 0/6] Add clock support for Mediatek MT2701 Date: Wed, 27 Jan 2016 15:20:58 +0800 Message-ID: <1453879264-37915-1-git-send-email-jamesjj.liao@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Sender: linux-clk-owner@vger.kernel.org To: Matthias Brugger , Mike Turquette , Stephen Boyd , Rob Herring Cc: John Crispin , Sascha Hauer , Daniel Kurtz , Philipp Zabel , srv_heupstream@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org List-Id: devicetree@vger.kernel.org This series is based on 4.5-rc1, add clock and reset controller support for Mediatek MT2701. This series also refined makefile and Kconfig to support configurable multiple SoC clock support. changes since v4: - Rebase to v4.5-rc1. - Remove CLK_SET_RATE_PARENT from divider flags. - Add img_jpgdec_smi clock. - Move clk/mediatek/Kconfig into menu section in clk/Kconfig. changes since v3: - Change the parent of mm_mdp_bls_26m from clk26m to pwm_sel. changes since v2: - Fix ethsys definition. - Replace read-modify-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine the makefile to support multiple clock drivers dt-bindings: ARM: Mediatek: Document bindings for MT2701 Shunli Wang (4): clk: mediatek: Add dt-bindings for MT2701 clocks clk: mediatek: Add MT2701 clock support reset: mediatek: Add MT2701 reset controller dt-binding file reset: mediatek: Add MT2701 reset driver .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,bdpsys.txt | 22 + .../bindings/arm/mediatek/mediatek,ethsys.txt | 22 + .../bindings/arm/mediatek/mediatek,hifsys.txt | 22 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 + .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,pericfg.txt | 1 + .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 31 + drivers/clk/mediatek/Makefile | 7 +- drivers/clk/mediatek/clk-gate.c | 52 + drivers/clk/mediatek/clk-gate.h | 2 + drivers/clk/mediatek/clk-mt2701.c | 1217 ++++++++++++++++++++ drivers/clk/mediatek/clk-mtk.c | 25 + drivers/clk/mediatek/clk-mtk.h | 34 +- include/dt-bindings/clock/mt2701-clk.h | 482 ++++++++ include/dt-bindings/reset/mt2701-resets.h | 83 ++ 20 files changed, 2001 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt create mode 100644 drivers/clk/mediatek/Kconfig create mode 100644 drivers/clk/mediatek/clk-mt2701.c create mode 100644 include/dt-bindings/clock/mt2701-clk.h create mode 100644 include/dt-bindings/reset/mt2701-resets.h -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: jamesjj.liao@mediatek.com (James Liao) Date: Wed, 27 Jan 2016 15:20:58 +0800 Subject: [PATCH v5 0/6] Add clock support for Mediatek MT2701 Message-ID: <1453879264-37915-1-git-send-email-jamesjj.liao@mediatek.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This series is based on 4.5-rc1, add clock and reset controller support for Mediatek MT2701. This series also refined makefile and Kconfig to support configurable multiple SoC clock support. changes since v4: - Rebase to v4.5-rc1. - Remove CLK_SET_RATE_PARENT from divider flags. - Add img_jpgdec_smi clock. - Move clk/mediatek/Kconfig into menu section in clk/Kconfig. changes since v3: - Change the parent of mm_mdp_bls_26m from clk26m to pwm_sel. changes since v2: - Fix ethsys definition. - Replace read-modify-write with regmap_update_bits() in clock operations. - Move mt2701-resets.h to include/dt-bindings/reset/. - Add hifsys reset patch from John Crispin. changes since v1: - Document MT2701 compatible strings. James Liao (2): clk: mediatek: Refine the makefile to support multiple clock drivers dt-bindings: ARM: Mediatek: Document bindings for MT2701 Shunli Wang (4): clk: mediatek: Add dt-bindings for MT2701 clocks clk: mediatek: Add MT2701 clock support reset: mediatek: Add MT2701 reset controller dt-binding file reset: mediatek: Add MT2701 reset driver .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 + .../bindings/arm/mediatek/mediatek,bdpsys.txt | 22 + .../bindings/arm/mediatek/mediatek,ethsys.txt | 22 + .../bindings/arm/mediatek/mediatek,hifsys.txt | 22 + .../bindings/arm/mediatek/mediatek,imgsys.txt | 1 + .../bindings/arm/mediatek/mediatek,infracfg.txt | 1 + .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../bindings/arm/mediatek/mediatek,pericfg.txt | 1 + .../bindings/arm/mediatek/mediatek,topckgen.txt | 1 + .../bindings/arm/mediatek/mediatek,vdecsys.txt | 1 + drivers/clk/Kconfig | 1 + drivers/clk/mediatek/Kconfig | 31 + drivers/clk/mediatek/Makefile | 7 +- drivers/clk/mediatek/clk-gate.c | 52 + drivers/clk/mediatek/clk-gate.h | 2 + drivers/clk/mediatek/clk-mt2701.c | 1217 ++++++++++++++++++++ drivers/clk/mediatek/clk-mtk.c | 25 + drivers/clk/mediatek/clk-mtk.h | 34 +- include/dt-bindings/clock/mt2701-clk.h | 482 ++++++++ include/dt-bindings/reset/mt2701-resets.h | 83 ++ 20 files changed, 2001 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt create mode 100644 drivers/clk/mediatek/Kconfig create mode 100644 drivers/clk/mediatek/clk-mt2701.c create mode 100644 include/dt-bindings/clock/mt2701-clk.h create mode 100644 include/dt-bindings/reset/mt2701-resets.h -- 1.9.1