From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38406) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOQVx-0002gD-L6 for qemu-devel@nongnu.org; Wed, 27 Jan 2016 08:52:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aOQVt-00026L-9V for qemu-devel@nongnu.org; Wed, 27 Jan 2016 08:52:05 -0500 Received: from mail-wm0-x22f.google.com ([2a00:1450:400c:c09::22f]:33098) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aOQVs-000264-O7 for qemu-devel@nongnu.org; Wed, 27 Jan 2016 08:52:01 -0500 Received: by mail-wm0-x22f.google.com with SMTP id l66so3563404wml.0 for ; Wed, 27 Jan 2016 05:52:00 -0800 (PST) From: Eric Auger Date: Wed, 27 Jan 2016 13:51:48 +0000 Message-Id: <1453902715-25304-1-git-send-email-eric.auger@linaro.org> Subject: [Qemu-devel] [RFC 0/7] KVM PCI/MSI passthrough with mach-virt List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, alex.williamson@redhat.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, pbonzini@redhat.com, agraf@suse.de Cc: Bharat.Bhushan@freescale.com, suravee.suthikulpanit@amd.com, christoffer.dall@linaro.org This series enables KVM PCI/MSI passthrough with mach-virt. A new memory region type is introduced (reserved iova). On vfio_listener_region_add this IOVA region is registered to the kernel with VFIO_IOMMU_MAP_DMA (using the new VFIO_DMA_MAP_FLAG_MSI_RESERVED_IOVA flag). The host VFIO PCI driver then can use this IOVA window to map some host physical addresses, accessed by passthrough'ed PCI devices, through the IOMMU. The first goal is to map host MSI controller frames (GICv2M, GITS_TRANSLATER). mach-virt currently instantiates a 16x64kB reserved IOVA window. This provisions for future usage. Most probably this exceeds MSI binding needs. The series includes Pranav/Tushar' series: QEMU, [v2 0/2] Generic PCIe host bridge INTx determination for INTx routing ((https://lists.nongnu.org/archive/html/qemu-devel/2015-04/msg04361.html)) Those patches are not mandated for PCI/MSI passthrough to work but without those, the following warning is observed and can puzzle the end-user: "qemu-system-aarch64: PCI: Bug - unimplemented PCI INTx routing (gpex-pcihost)" If prefered, this series can be maintained separately. I just put them here for consistency. Best Regards Eric Dependencies: The series depends on kernel series: "[PATCH 00/10] KVM PCIe/MSI passthrough on ARM/ARM64", (https://lkml.org/lkml/2016/1/26/371) Git: QEMU: https://git.linaro.org/people/eric.auger/qemu.git/shortlog/refs/heads/v2.5.0-pci-passthrough-rfc Kernel: https://git.linaro.org/people/eric.auger/linux.git/shortlog/refs/heads/v4.5-rc1-pcie-passthrough-v1 Testing: - on ARM64 AMD Overdrive HW with one e1000e PCIe card. Eric Auger (7): linux-headers: partial update for VFIO reserved IOVA registration Add a function to determine interrupt number for INTx routing Generic PCIe host bridge INTx determination for INTx routing hw: vfio: common: introduce vfio_register_reserved_iova memory: add reserved_iova region type hw: arm: virt: register reserved IOVA region hw: vfio: common: adapt vfio_listeners for reserved_iova region hw/arm/virt.c | 14 ++++++++++ hw/pci-host/gpex.c | 12 ++++++++ hw/vfio/common.c | 68 ++++++++++++++++++++++++++++++++++++---------- include/exec/memory.h | 29 ++++++++++++++++++++ include/hw/arm/virt.h | 1 + include/hw/pci-host/gpex.h | 1 + linux-headers/linux/vfio.h | 15 ++++++++-- memory.c | 11 ++++++++ 8 files changed, 134 insertions(+), 17 deletions(-) -- 1.9.1