From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38708) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aP1GR-0003jz-6E for qemu-devel@nongnu.org; Fri, 29 Jan 2016 00:06:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aP1GL-0001Vc-Tv for qemu-devel@nongnu.org; Fri, 29 Jan 2016 00:06:31 -0500 From: David Gibson Date: Fri, 29 Jan 2016 16:07:11 +1100 Message-Id: <1454044031-5930-41-git-send-email-david@gibson.dropbear.id.au> In-Reply-To: <1454044031-5930-1-git-send-email-david@gibson.dropbear.id.au> References: <1454044031-5930-1-git-send-email-david@gibson.dropbear.id.au> Subject: [Qemu-devel] [PULL 39/39] target-ppc: Make every FPSCR_ macro have a corresponding FP_ macro List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org, agraf@suse.de Cc: aik@ozlabs.ru, mdroth@linux.vnet.ibm.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, James Clarke , David Gibson From: James Clarke Signed-off-by: James Clarke Signed-off-by: David Gibson --- target-ppc/cpu.h | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 0820390..f300c86 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -687,24 +687,37 @@ enum { #define FP_FX (1ull << FPSCR_FX) #define FP_FEX (1ull << FPSCR_FEX) +#define FP_VX (1ull << FPSCR_VX) #define FP_OX (1ull << FPSCR_OX) -#define FP_OE (1ull << FPSCR_OE) #define FP_UX (1ull << FPSCR_UX) -#define FP_UE (1ull << FPSCR_UE) -#define FP_XX (1ull << FPSCR_XX) -#define FP_XE (1ull << FPSCR_XE) #define FP_ZX (1ull << FPSCR_ZX) -#define FP_ZE (1ull << FPSCR_ZE) -#define FP_VX (1ull << FPSCR_VX) +#define FP_XX (1ull << FPSCR_XX) #define FP_VXSNAN (1ull << FPSCR_VXSNAN) #define FP_VXISI (1ull << FPSCR_VXISI) -#define FP_VXIMZ (1ull << FPSCR_VXIMZ) -#define FP_VXZDZ (1ull << FPSCR_VXZDZ) #define FP_VXIDI (1ull << FPSCR_VXIDI) +#define FP_VXZDZ (1ull << FPSCR_VXZDZ) +#define FP_VXIMZ (1ull << FPSCR_VXIMZ) #define FP_VXVC (1ull << FPSCR_VXVC) +#define FP_FR (1ull << FSPCR_FR) +#define FP_FI (1ull << FPSCR_FI) +#define FP_C (1ull << FPSCR_C) +#define FP_FL (1ull << FPSCR_FL) +#define FP_FG (1ull << FPSCR_FG) +#define FP_FE (1ull << FPSCR_FE) +#define FP_FU (1ull << FPSCR_FU) +#define FP_FPCC (FP_FL | FP_FG | FP_FE | FP_FU) +#define FP_FPRF (FP_C | FP_FL | FP_FG | FP_FE | FP_FU) +#define FP_VXSOFT (1ull << FPSCR_VXSOFT) +#define FP_VXSQRT (1ull << FPSCR_VXSQRT) #define FP_VXCVI (1ull << FPSCR_VXCVI) #define FP_VE (1ull << FPSCR_VE) -#define FP_FI (1ull << FPSCR_FI) +#define FP_OE (1ull << FPSCR_OE) +#define FP_UE (1ull << FPSCR_UE) +#define FP_ZE (1ull << FPSCR_ZE) +#define FP_XE (1ull << FPSCR_XE) +#define FP_NI (1ull << FPSCR_NI) +#define FP_RN1 (1ull << FPSCR_RN1) +#define FP_RN (1ull << FPSCR_RN) /*****************************************************************************/ /* Vector status and control register */ -- 2.5.0