From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752753AbcBBDll (ORCPT ); Mon, 1 Feb 2016 22:41:41 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:32826 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752501AbcBBDlh (ORCPT ); Mon, 1 Feb 2016 22:41:37 -0500 From: Caesar Wang To: heiko@sntech.de Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, keescook@google.com, linux-kernel@vger.kernel.org, jeffy.chen@rock-chips.com, leozwang@google.com, zhengxing , Caesar Wang Subject: [PATCH v5 3/8] ARM: dts: rockchip: add support emac for RK3036 Date: Tue, 2 Feb 2016 11:40:51 +0800 Message-Id: <1454384453-7127-2-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454384453-7127-1-git-send-email-wxt@rock-chips.com> References: <1454384032-6794-1-git-send-email-wxt@rock-chips.com> <1454384453-7127-1-git-send-email-wxt@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: zhengxing This patch adds the emac device node for rk3036. We need to let mac clock under the DPLL which is able to provide the accurate 50MHz what mac_ref need, since that will cause some unstable things if the cpufreq is working. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang --- Changes in v5: - remove unused commit content. Changes in v4: - included in the kylin series patches. - This patch picked up from https://patchwork.kernel.org/patch/7924971/ - Change to solve the conflict based on the Heiko's branch. - Make the emac parent as the DPLL. arch/arm/boot/dts/rk3036-evb.dts | 23 ++++++++++++++++++++++ arch/arm/boot/dts/rk3036-kylin.dts | 21 ++++++++++++++++++++ arch/arm/boot/dts/rk3036.dtsi | 39 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+) diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts index 28a0336..d7d3719 100644 --- a/arch/arm/boot/dts/rk3036-evb.dts +++ b/arch/arm/boot/dts/rk3036-evb.dts @@ -47,6 +47,17 @@ compatible = "rockchip,rk3036-evb", "rockchip,rk3036"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &i2c1 { status = "okay"; @@ -62,3 +73,15 @@ &uart2 { status = "okay"; }; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; +}; diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 1037ad6..cd45434 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -112,6 +112,17 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; @@ -382,6 +393,16 @@ }; &pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + leds { led_ctl: led-ctl { rockchip,pins = <2 30 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 7abe3e2..532f232 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -222,6 +222,27 @@ status = "disabled"; }; + emac: ethernet@10200000 { + compatible = "rockchip,rk3036-emac", "snps,arc-emac"; + reg = <0x10200000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; + clock-names = "hclk", "macref", "macclk"; + /* + * Fix the emac parent clock is DPLL instead of APLL. + * since that will cause some unstable things if the cpufreq + * is working. (e.g: the accurate 50MHz what mac_ref need) + */ + assigned-clocks = <&cru SCLK_MACPLL>; + assigned-clock-parents = <&cru PLL_DPLL>; + max-speed = <100>; + phy-mode = "rmii"; + status = "disabled"; + }; + sdmmc: dwmmc@10214000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -613,6 +634,24 @@ }; }; + emac { + emac_xfer: emac-xfer { + rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */ + <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */ + <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */ + <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */ + <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */ + <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */ + <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */ + <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */ + }; + + emac_mdio: emac-mdio { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */ + <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */ + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: wxt@rock-chips.com (Caesar Wang) Date: Tue, 2 Feb 2016 11:40:51 +0800 Subject: [PATCH v5 3/8] ARM: dts: rockchip: add support emac for RK3036 In-Reply-To: <1454384453-7127-1-git-send-email-wxt@rock-chips.com> References: <1454384032-6794-1-git-send-email-wxt@rock-chips.com> <1454384453-7127-1-git-send-email-wxt@rock-chips.com> Message-ID: <1454384453-7127-2-git-send-email-wxt@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: zhengxing This patch adds the emac device node for rk3036. We need to let mac clock under the DPLL which is able to provide the accurate 50MHz what mac_ref need, since that will cause some unstable things if the cpufreq is working. Signed-off-by: Xing Zheng Signed-off-by: Caesar Wang --- Changes in v5: - remove unused commit content. Changes in v4: - included in the kylin series patches. - This patch picked up from https://patchwork.kernel.org/patch/7924971/ - Change to solve the conflict based on the Heiko's branch. - Make the emac parent as the DPLL. arch/arm/boot/dts/rk3036-evb.dts | 23 ++++++++++++++++++++++ arch/arm/boot/dts/rk3036-kylin.dts | 21 ++++++++++++++++++++ arch/arm/boot/dts/rk3036.dtsi | 39 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+) diff --git a/arch/arm/boot/dts/rk3036-evb.dts b/arch/arm/boot/dts/rk3036-evb.dts index 28a0336..d7d3719 100644 --- a/arch/arm/boot/dts/rk3036-evb.dts +++ b/arch/arm/boot/dts/rk3036-evb.dts @@ -47,6 +47,17 @@ compatible = "rockchip,rk3036-evb", "rockchip,rk3036"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy at 0 { + reg = <0>; + }; +}; + &i2c1 { status = "okay"; @@ -62,3 +73,15 @@ &uart2 { status = "okay"; }; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; +}; diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts index 1037ad6..cd45434 100644 --- a/arch/arm/boot/dts/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rk3036-kylin.dts @@ -112,6 +112,17 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + status = "okay"; + + phy0: ethernet-phy at 0 { + reg = <0>; + }; +}; + &emmc { status = "okay"; }; @@ -382,6 +393,16 @@ }; &pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <2 22 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + leds { led_ctl: led-ctl { rockchip,pins = <2 30 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 7abe3e2..532f232 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -222,6 +222,27 @@ status = "disabled"; }; + emac: ethernet at 10200000 { + compatible = "rockchip,rk3036-emac", "snps,arc-emac"; + reg = <0x10200000 0x4000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>; + clock-names = "hclk", "macref", "macclk"; + /* + * Fix the emac parent clock is DPLL instead of APLL. + * since that will cause some unstable things if the cpufreq + * is working. (e.g: the accurate 50MHz what mac_ref need) + */ + assigned-clocks = <&cru SCLK_MACPLL>; + assigned-clock-parents = <&cru PLL_DPLL>; + max-speed = <100>; + phy-mode = "rmii"; + status = "disabled"; + }; + sdmmc: dwmmc at 10214000 { compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -613,6 +634,24 @@ }; }; + emac { + emac_xfer: emac-xfer { + rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_default>, /* crs_dvalid */ + <2 13 RK_FUNC_1 &pcfg_pull_default>, /* tx_en */ + <2 14 RK_FUNC_1 &pcfg_pull_default>, /* mac_clk */ + <2 15 RK_FUNC_1 &pcfg_pull_default>, /* rx_err */ + <2 16 RK_FUNC_1 &pcfg_pull_default>, /* rxd1 */ + <2 17 RK_FUNC_1 &pcfg_pull_default>, /* rxd0 */ + <2 18 RK_FUNC_1 &pcfg_pull_default>, /* txd1 */ + <2 19 RK_FUNC_1 &pcfg_pull_default>; /* txd0 */ + }; + + emac_mdio: emac-mdio { + rockchip,pins = <2 12 RK_FUNC_1 &pcfg_pull_default>, /* mac_md */ + <2 25 RK_FUNC_1 &pcfg_pull_default>; /* mac_mdclk */ + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>, -- 1.9.1