From mboxrd@z Thu Jan  1 00:00:00 1970
From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Subject: [PATCH v1 1/1] drm/i915: Hold RPM reference while
	setting freq limits through sysfs
Date: Sat,  6 Feb 2016 00:25:01 +0530
Message-ID: <1454698501-2188-1-git-send-email-sagar.a.kamble@intel.com>
Mime-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Return-path: <intel-gfx-bounces@lists.freedesktop.org>
Received: from mga11.intel.com (mga11.intel.com [192.55.52.93])
 by gabe.freedesktop.org (Postfix) with ESMTP id CC9E16E1DF
 for <intel-gfx@lists.freedesktop.org>; Fri,  5 Feb 2016 10:52:43 -0800 (PST)
List-Unsubscribe: <http://lists.freedesktop.org/mailman/options/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=unsubscribe>
List-Archive: <http://lists.freedesktop.org/archives/intel-gfx>
List-Post: <mailto:intel-gfx@lists.freedesktop.org>
List-Help: <mailto:intel-gfx-request@lists.freedesktop.org?subject=help>
List-Subscribe: <http://lists.freedesktop.org/mailman/listinfo/intel-gfx>,
 <mailto:intel-gfx-request@lists.freedesktop.org?subject=subscribe>
Errors-To: intel-gfx-bounces@lists.freedesktop.org
Sender: "Intel-gfx" <intel-gfx-bounces@lists.freedesktop.org>
To: intel-gfx@lists.freedesktop.org
Cc: shashidhar.hiremath@intel.com
List-Id: intel-gfx@lists.freedesktop.org

U2lnbmVkLW9mZi1ieTogU2FnYXIgQXJ1biBLYW1ibGUgPHNhZ2FyLmEua2FtYmxlQGludGVsLmNv
bT4KLS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3N5c2ZzLmMgfCA4ICsrKysrKysrCiAx
IGZpbGUgY2hhbmdlZCwgOCBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUv
ZHJtL2k5MTUvaTkxNV9zeXNmcy5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9zeXNmcy5j
CmluZGV4IGM2MTg4ZGQuLmJiMmZkNzggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1
L2k5MTVfc3lzZnMuYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3N5c2ZzLmMKQEAg
LTM3MCw2ICszNzAsOCBAQCBzdGF0aWMgc3NpemVfdCBndF9tYXhfZnJlcV9taHpfc3RvcmUoc3Ry
dWN0IGRldmljZSAqa2RldiwKIAogCWZsdXNoX2RlbGF5ZWRfd29yaygmZGV2X3ByaXYtPnJwcy5k
ZWxheWVkX3Jlc3VtZV93b3JrKTsKIAorCWludGVsX3J1bnRpbWVfcG1fZ2V0KGRldl9wcml2KTsK
KwogCW11dGV4X2xvY2soJmRldl9wcml2LT5ycHMuaHdfbG9jayk7CiAKIAl2YWwgPSBpbnRlbF9m
cmVxX29wY29kZShkZXZfcHJpdiwgdmFsKTsKQEAgLTM5OCw2ICs0MDAsOCBAQCBzdGF0aWMgc3Np
emVfdCBndF9tYXhfZnJlcV9taHpfc3RvcmUoc3RydWN0IGRldmljZSAqa2RldiwKIAogCW11dGV4
X3VubG9jaygmZGV2X3ByaXYtPnJwcy5od19sb2NrKTsKIAorCWludGVsX3J1bnRpbWVfcG1fcHV0
KGRldl9wcml2KTsKKwogCXJldHVybiBjb3VudDsKIH0KIApAQCAtNDMzLDYgKzQzNyw4IEBAIHN0
YXRpYyBzc2l6ZV90IGd0X21pbl9mcmVxX21oel9zdG9yZShzdHJ1Y3QgZGV2aWNlICprZGV2LAog
CiAJZmx1c2hfZGVsYXllZF93b3JrKCZkZXZfcHJpdi0+cnBzLmRlbGF5ZWRfcmVzdW1lX3dvcmsp
OwogCisJaW50ZWxfcnVudGltZV9wbV9nZXQoZGV2X3ByaXYpOworCiAJbXV0ZXhfbG9jaygmZGV2
X3ByaXYtPnJwcy5od19sb2NrKTsKIAogCXZhbCA9IGludGVsX2ZyZXFfb3Bjb2RlKGRldl9wcml2
LCB2YWwpOwpAQCAtNDU3LDYgKzQ2Myw4IEBAIHN0YXRpYyBzc2l6ZV90IGd0X21pbl9mcmVxX21o
el9zdG9yZShzdHJ1Y3QgZGV2aWNlICprZGV2LAogCiAJbXV0ZXhfdW5sb2NrKCZkZXZfcHJpdi0+
cnBzLmh3X2xvY2spOwogCisJaW50ZWxfcnVudGltZV9wbV9wdXQoZGV2X3ByaXYpOworCiAJcmV0
dXJuIGNvdW50OwogCiB9Ci0tIAoxLjkuMQoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMu
ZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0
aW5mby9pbnRlbC1nZngK