From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932847AbcBIKmT (ORCPT ); Tue, 9 Feb 2016 05:42:19 -0500 Received: from mail-sn1nam02on0084.outbound.protection.outlook.com ([104.47.36.84]:20288 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932697AbcBIKmN (ORCPT ); Tue, 9 Feb 2016 05:42:13 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; york.ac.uk; dkim=none (message not signed) header.d=none;york.ac.uk; dmarc=bestguesspass action=none header.from=xilinx.com; From: Bharat Kumar Gogada To: , , , , , , , , , , , , , , CC: , , , , "Bharat Kumar Gogada" , Ravi Kiran Gummaluri Subject: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Tue, 9 Feb 2016 16:11:56 +0530 Message-ID: <1455014518-8708-4-git-send-email-bharatku@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22120.006 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(46386002)(2201001)(36756003)(5008740100001)(4001430100002)(11100500001)(6806005)(45336002)(87936001)(1220700001)(586003)(52956003)(1096002)(19580395003)(48376002)(103686003)(47776003)(33646002)(90966002)(50466002)(19580405001)(86362001)(106466001)(50986999)(189998001)(5001960100002)(5001770100001)(107886002)(92566002)(42186005)(50226001)(2950100001)(2906002)(5003940100001)(4326007)(229853001)(63266004)(76176999)(107986001)(921003)(1121003)(83996005)(2101003);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT133;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;MLV:sfv;A:1;MX:1;LANG:en; MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: a905889b-f504-4405-ba67-08d3313daae4 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:SN1NAM02HT133; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13018025)(13015025)(13023025)(13024025)(5005006)(13017025)(8121501046)(3002001)(10201501046);SRVR:SN1NAM02HT133;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT133; X-Forefront-PRVS: 08476BC6EF X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2016 10:42:11.3161 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT133 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both Zynq and Microblaze Architectures. With these modifications drivers/pci/host/pcie-xilinx.c, will work on both Zynq and Microblaze Architectures. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Ravi Kiran Gummaluri --- Changes: Removed unneccessary architecture dependent number of MSI's. Added #ifdef to pci_fixup_irqs which is ARM specific API. --- drivers/pci/host/pcie-xilinx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 13fec35..6cbce34 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev) #endif pci_scan_child_bus(bus); pci_assign_unassigned_bus_resources(bus); +#ifdef CONFIG_ARM pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); +#endif pci_bus_add_devices(bus); platform_set_drvdata(pdev, port); -- 2.1.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bharat Kumar Gogada Subject: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Tue, 9 Feb 2016 16:11:56 +0530 Message-ID: <1455014518-8708-4-git-send-email-bharatku@xilinx.com> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> Sender: linux-pci-owner@vger.kernel.org To: bhelgaas@google.com, michals@xilinx.com, lorenzo.pieralisi@arm.com, paul.burton@imgtec.com, yinghai@kernel.org, wangyijing@huawei.com, robh@kernel.org, russell.joyce@york.ac.uk, sorenb@xilinx.com, jiang.liu@linux.intel.com, arnd@arndb.de, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Bharat Kumar Gogada , Ravi Kiran Gummaluri List-Id: devicetree@vger.kernel.org Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both Zynq and Microblaze Architectures. With these modifications drivers/pci/host/pcie-xilinx.c, will work on both Zynq and Microblaze Architectures. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Ravi Kiran Gummaluri --- Changes: Removed unneccessary architecture dependent number of MSI's. Added #ifdef to pci_fixup_irqs which is ARM specific API. --- drivers/pci/host/pcie-xilinx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 13fec35..6cbce34 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev) #endif pci_scan_child_bus(bus); pci_assign_unassigned_bus_resources(bus); +#ifdef CONFIG_ARM pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); +#endif pci_bus_add_devices(bus); platform_set_drvdata(pdev, port); -- 2.1.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: bharat.kumar.gogada@xilinx.com (Bharat Kumar Gogada) Date: Tue, 9 Feb 2016 16:11:56 +0530 Subject: [PATCH V3 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze In-Reply-To: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> References: <1455014518-8708-1-git-send-email-bharatku@xilinx.com> Message-ID: <1455014518-8708-4-git-send-email-bharatku@xilinx.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Modifying Xilinx AXI PCIe Host Bridge Soft IP driver to work on both Zynq and Microblaze Architectures. With these modifications drivers/pci/host/pcie-xilinx.c, will work on both Zynq and Microblaze Architectures. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Ravi Kiran Gummaluri --- Changes: Removed unneccessary architecture dependent number of MSI's. Added #ifdef to pci_fixup_irqs which is ARM specific API. --- drivers/pci/host/pcie-xilinx.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index 13fec35..6cbce34 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -704,7 +704,9 @@ static int xilinx_pcie_probe(struct platform_device *pdev) #endif pci_scan_child_bus(bus); pci_assign_unassigned_bus_resources(bus); +#ifdef CONFIG_ARM pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); +#endif pci_bus_add_devices(bus); platform_set_drvdata(pdev, port); -- 2.1.1