From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933250AbcBIW4o (ORCPT ); Tue, 9 Feb 2016 17:56:44 -0500 Received: from mail-bn1on0073.outbound.protection.outlook.com ([157.56.110.73]:47120 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932829AbcBIWyZ (ORCPT ); Tue, 9 Feb 2016 17:54:25 -0500 X-Greylist: delayed 2705 seconds by postgrey-1.27 at vger.kernel.org; Tue, 09 Feb 2016 17:54:24 EST Authentication-Results: 8bytes.org; dkim=none (message not signed) header.d=none;8bytes.org; dmarc=none action=none header.from=amd.com; From: Suravee Suthikulpanit To: , , , , CC: , , , Suravee Suthikulpanit Subject: [PATCH V3 0/5] perf/amd/iommu: Enable multi-IOMMU support Date: Tue, 9 Feb 2016 16:53:50 -0600 Message-ID: <1455058435-8716-1-git-send-email-Suravee.Suthikulpanit@amd.com> X-Mailer: git-send-email 2.5.0 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [58.10.104.205] X-ClientProxiedBy: SG2PR03CA0004.apcprd03.prod.outlook.com (25.160.233.14) To BLUPR12MB0434.namprd12.prod.outlook.com (25.162.92.14) X-MS-Office365-Filtering-Correlation-Id: 73b7d454-6bca-4830-4e21-08d331a3f33c X-Microsoft-Exchange-Diagnostics: 1;BLUPR12MB0434;2:Dv7gLE3qb6dyoZN2DNuqqZru8OQJEbC/YGCS/p6yGXdnVUHJMelEMDhaz+TTa4G2R+NWjBSr5JT31a+6xPT55cpyc9Jewjcvrwqgll7BA4/GpZJITVmlKFjXf/K4Ng/uu5KnzcvX6zY30wZ1YejpLdFrrxGmJMgqm7bCErNW6FgmE9s9kxl5DS0I3ArcQicv;3:4bGm8RSOWu/oYIlj3wbQcSyZDZpYD5nYwvsqHOemSRvWv19vYiy83banOpGOT/oo3L4bmHiBaX9s5vjazPujQoWiGtXpyXXZphN5n7yL8Jonjxqh2uPrNDAdWyvANcUw;25:Plr6X1w1KydwT6VIrZcOU0z13bHw3PBlPFjpvUC9UZLR8SWc2JNZlhMQ6CVHuSra520KNgbQ/aGgtGM8Qzxo/bEsi44w1ESIvp/arkbG9hC6Q7sH5M0t6MsIyOsL0gQ3B6ZcbU8F3GC8y5k11IqsVTADSbnVGo2BTBVT4DQCqHTKC8FJpZVWywMXp1K68EPojBz75wNj1r1ffUlnkG3BIOF9RW5A+jXl4byk8YgurHX9ymwgvHCG9GyevsYdOAA4tWJUFiaEGNz7L/SjWebMrA5Ga1BNaD3W6M8rwUKy7mNgwS1NTmZ1mB+JrGjLRQTQ X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR12MB0434; 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It introduces new AMD IOMMU APIs, which will are used by the AMD IOMMU Perf driver to access performance counters in multiple IOMMUs. In addition, this series should also fix current AMD IOMMU PMU driver initialization issue in some existing KV and CZ platform. Note that this patch also fixes the issue where IOMMU driver fails to write to IOMMU perf counter as reported by Andreas Hartmann here (http://comments.gmane.org/gmane.linux.kernel.pci/49147). Git branch containing this patch series is available here: https://github.com/ssuthiku/linux.git perf-iommu-v3 Changes from V2 ( https://lkml.org/lkml/2016/1/1/141) * Ported to 4.5.0-rc2 * Add reviewed by Joerg for patch 1 and 2 * Remove EXPORT_SYMBOL from patch 3 (per Joerg suggestion) * Merge patch 4/6 and 6/6 from V2 into 5/5 in V3 and add more description in the commit message and in code comment. * Patch 5: modify the logic to update counts to get rid off un-necessary local64_cmpxchg(). Changes from V1 (https://lkml.org/lkml/2015/12/22/535): * Update patch3 and 6 to use amd_iommus_present instead of introducing amd_iommu_cnt static variable since they are the same thing Suravee Suthikulpanit (5): perf/amd/iommu: Consolidate and move perf_event_amd_iommu header perf/amd/iommu: Modify functions to query max banks and counters iommu/amd: Introduce amd_iommu_get_num_iommus() perf/amd/iommu: Introduce get_iommu_bnk_cnt_evt_idx perf/amd/iommu: Enable support for multiple IOMMUs arch/x86/kernel/cpu/perf_event_amd_iommu.c | 164 ++++++++++++++++++++--------- arch/x86/kernel/cpu/perf_event_amd_iommu.h | 40 ------- drivers/iommu/amd_iommu_init.c | 116 ++++++++++++++++---- drivers/iommu/amd_iommu_proto.h | 7 -- include/linux/perf/perf_event_amd_iommu.h | 43 ++++++++ 5 files changed, 254 insertions(+), 116 deletions(-) delete mode 100644 arch/x86/kernel/cpu/perf_event_amd_iommu.h create mode 100644 include/linux/perf/perf_event_amd_iommu.h -- 2.5.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: [PATCH V3 0/5] perf/amd/iommu: Enable multi-IOMMU support Date: Tue, 9 Feb 2016 16:53:50 -0600 Message-ID: <1455058435-8716-1-git-send-email-Suravee.Suthikulpanit@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org, bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org, peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, acme-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: andihartmann-KuiJ5kEpwI6ELgA04lAiVw@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: iommu@lists.linux-foundation.org From: Suravee Suthikulpanit This patch series modifies the existing perf_event_amd_iommu driver to support systems with multiple IOMMUs. It introduces new AMD IOMMU APIs, which will are used by the AMD IOMMU Perf driver to access performance counters in multiple IOMMUs. In addition, this series should also fix current AMD IOMMU PMU driver initialization issue in some existing KV and CZ platform. Note that this patch also fixes the issue where IOMMU driver fails to write to IOMMU perf counter as reported by Andreas Hartmann here (http://comments.gmane.org/gmane.linux.kernel.pci/49147). Git branch containing this patch series is available here: https://github.com/ssuthiku/linux.git perf-iommu-v3 Changes from V2 ( https://lkml.org/lkml/2016/1/1/141) * Ported to 4.5.0-rc2 * Add reviewed by Joerg for patch 1 and 2 * Remove EXPORT_SYMBOL from patch 3 (per Joerg suggestion) * Merge patch 4/6 and 6/6 from V2 into 5/5 in V3 and add more description in the commit message and in code comment. * Patch 5: modify the logic to update counts to get rid off un-necessary local64_cmpxchg(). Changes from V1 (https://lkml.org/lkml/2015/12/22/535): * Update patch3 and 6 to use amd_iommus_present instead of introducing amd_iommu_cnt static variable since they are the same thing Suravee Suthikulpanit (5): perf/amd/iommu: Consolidate and move perf_event_amd_iommu header perf/amd/iommu: Modify functions to query max banks and counters iommu/amd: Introduce amd_iommu_get_num_iommus() perf/amd/iommu: Introduce get_iommu_bnk_cnt_evt_idx perf/amd/iommu: Enable support for multiple IOMMUs arch/x86/kernel/cpu/perf_event_amd_iommu.c | 164 ++++++++++++++++++++--------- arch/x86/kernel/cpu/perf_event_amd_iommu.h | 40 ------- drivers/iommu/amd_iommu_init.c | 116 ++++++++++++++++---- drivers/iommu/amd_iommu_proto.h | 7 -- include/linux/perf/perf_event_amd_iommu.h | 43 ++++++++ 5 files changed, 254 insertions(+), 116 deletions(-) delete mode 100644 arch/x86/kernel/cpu/perf_event_amd_iommu.h create mode 100644 include/linux/perf/perf_event_amd_iommu.h -- 2.5.0