From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752941AbcBWOOJ (ORCPT ); Tue, 23 Feb 2016 09:14:09 -0500 Received: from mail-bn1on0082.outbound.protection.outlook.com ([157.56.110.82]:60571 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753051AbcBWOOD (ORCPT ); Tue, 23 Feb 2016 09:14:03 -0500 Authentication-Results: 8bytes.org; dkim=none (message not signed) header.d=none;8bytes.org; dmarc=none action=none header.from=amd.com; From: Suravee Suthikulpanit To: , , , , CC: , , , , , "Suravee Suthikulpanit" , Suravee Suthikulpanit Subject: [PATCH V5 02/10] perf/amd/iommu: Consolidate and move perf_event_amd_iommu header Date: Tue, 23 Feb 2016 08:12:36 -0600 Message-ID: <1456236764-1569-3-git-send-email-Suravee.Suthikulpanit@amd.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit@amd.com> References: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [124.121.8.20] X-ClientProxiedBy: HKNPR06CA0045.apcprd06.prod.outlook.com (10.141.16.35) To BLUPR12MB0436.namprd12.prod.outlook.com (25.162.92.141) X-MS-Office365-Filtering-Correlation-Id: 33505430-819e-4d25-c1e9-08d33c5b9404 X-Microsoft-Exchange-Diagnostics: 1;BLUPR12MB0436;2:UhCD0QA6c+dC8ETFMffOYpNbN/36swofHp1HTVP7BNUsNNqVcWUvPCPZVc0GcwShvhk7pwwknfTmDkW1pVQ2HwQtsVypzQeGxlG0qsxklex7Q0RpdgT3rSsaJcsTeJ/6g9dRUPXLi86lIlYKTeA73ozWk89P4GyER6U5Er6gRAgSRxQ8Vgw+vpDKG0kQzYgO;3:dtazB/71Wdpcgwp9jZquBNMUP6z35HyBiAeBHZJeJsYnyLrLOi6g5caHW2dhFiASWYnC9EIRul65HwP9e2Z/S/bNzFZpJcnPwo/+aTNSHN22drF+gFpN+yK5DiDoAzo7;25:KbKjXnA90cU+hjy8z8q08tXsdfS8StKlxnDSHdgcuWKSTggBSgUXGNPJNy9NTpHdrvuC0QvDWLqcjucaWaVaoFlGz+FebRuwBfgqdC1Sx2dxY3xG7Ef6g9n3se6KK2VZ+LLlZP6VkN3vGrxied70x6U+Xa7VmDP2VrngUHT2Jpv8hDgf/X0ReOxk0hVBYOEVHxDt0amvzMyj6h1F1SZhW/soeEhkDKclKe8jRGhRKk3bxEY61XH7UT7XUDLLJCfVYBbno2vS/gPis/Xlgmaawfo9DM0YWx5tMS+ewmWIjFseuweCLcKUSN2REq1ePXiUldhoGvTEj8yVsfl8564tMCFss+3FQCiKVkLBWc+I0aM= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR12MB0436; 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Then, we consolidate declaration of AMD IOMMU performance counter APIs into one file. Reviewed-by: Joerg Roedel Signed-off-by: Suravee Suthikulpanit --- arch/x86/events/amd/iommu.c | 2 +- arch/x86/events/amd/iommu.h | 40 --------------------------------- arch/x86/include/asm/perf/amd/iommu.h | 42 +++++++++++++++++++++++++++++++++++ drivers/iommu/amd_iommu_init.c | 2 ++ drivers/iommu/amd_iommu_proto.h | 7 ------ 5 files changed, 45 insertions(+), 48 deletions(-) delete mode 100644 arch/x86/events/amd/iommu.h create mode 100644 arch/x86/include/asm/perf/amd/iommu.h diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c index 9da0d16..fb4aa7b 100644 --- a/arch/x86/events/amd/iommu.c +++ b/arch/x86/events/amd/iommu.c @@ -15,9 +15,9 @@ #include #include #include +#include #include "../../kernel/cpu/perf_event.h" -#include "iommu.h" #define COUNTER_SHIFT 16 diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h deleted file mode 100644 index 845d173..0000000 --- a/arch/x86/events/amd/iommu.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2013 Advanced Micro Devices, Inc. - * - * Author: Steven Kinney - * Author: Suravee Suthikulpanit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _PERF_EVENT_AMD_IOMMU_H_ -#define _PERF_EVENT_AMD_IOMMU_H_ - -/* iommu pc mmio region register indexes */ -#define IOMMU_PC_COUNTER_REG 0x00 -#define IOMMU_PC_COUNTER_SRC_REG 0x08 -#define IOMMU_PC_PASID_MATCH_REG 0x10 -#define IOMMU_PC_DOMID_MATCH_REG 0x18 -#define IOMMU_PC_DEVID_MATCH_REG 0x20 -#define IOMMU_PC_COUNTER_REPORT_REG 0x28 - -/* maximun specified bank/counters */ -#define PC_MAX_SPEC_BNKS 64 -#define PC_MAX_SPEC_CNTRS 16 - -/* iommu pc reg masks*/ -#define IOMMU_BASE_DEVID 0x0000 - -/* amd_iommu_init.c external support functions */ -extern bool amd_iommu_pc_supported(void); - -extern u8 amd_iommu_pc_get_max_banks(u16 devid); - -extern u8 amd_iommu_pc_get_max_counters(u16 devid); - -extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, - u8 fxn, u64 *value, bool is_write); - -#endif /*_PERF_EVENT_AMD_IOMMU_H_*/ diff --git a/arch/x86/include/asm/perf/amd/iommu.h b/arch/x86/include/asm/perf/amd/iommu.h new file mode 100644 index 0000000..72f64b7 --- /dev/null +++ b/arch/x86/include/asm/perf/amd/iommu.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2013 Advanced Micro Devices, Inc. + * + * Author: Steven Kinney + * Author: Suravee Suthikulpanit + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _PERF_EVENT_AMD_IOMMU_H_ +#define _PERF_EVENT_AMD_IOMMU_H_ + +/* iommu pc mmio region register indexes */ +#define IOMMU_PC_COUNTER_REG 0x00 +#define IOMMU_PC_COUNTER_SRC_REG 0x08 +#define IOMMU_PC_PASID_MATCH_REG 0x10 +#define IOMMU_PC_DOMID_MATCH_REG 0x18 +#define IOMMU_PC_DEVID_MATCH_REG 0x20 +#define IOMMU_PC_COUNTER_REPORT_REG 0x28 + +/* maximum specified bank/counters */ +#define PC_MAX_SPEC_BNKS 64 +#define PC_MAX_SPEC_CNTRS 16 + +/* iommu pc reg masks*/ +#define IOMMU_BASE_DEVID 0x0000 + +/* amd_iommu_init.c external support functions */ +bool amd_iommu_pc_supported(void); + +u8 amd_iommu_pc_get_max_banks(u16 devid); + +u8 amd_iommu_pc_get_max_counters(u16 devid); + +int amd_iommu_pc_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, u64 *value); + +int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, + u64 *value, bool is_write); + +#endif /*_PERF_EVENT_AMD_IOMMU_H_*/ diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 013bdff..d30f4b2 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -27,6 +27,8 @@ #include #include #include +#include + #include #include #include diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h index 0bd9eb3..ac2da91 100644 --- a/drivers/iommu/amd_iommu_proto.h +++ b/drivers/iommu/amd_iommu_proto.h @@ -55,13 +55,6 @@ extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid); extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); -/* IOMMU Performance Counter functions */ -extern bool amd_iommu_pc_supported(void); -extern u8 amd_iommu_pc_get_max_banks(u16 devid); -extern u8 amd_iommu_pc_get_max_counters(u16 devid); -extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, - u64 *value, bool is_write); - #ifdef CONFIG_IRQ_REMAP extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu); #else -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: [PATCH V5 02/10] perf/amd/iommu: Consolidate and move perf_event_amd_iommu header Date: Tue, 23 Feb 2016 08:12:36 -0600 Message-ID: <1456236764-1569-3-git-send-email-Suravee.Suthikulpanit@amd.com> References: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1456236764-1569-1-git-send-email-Suravee.Suthikulpanit-5C7GfCeVMHo@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org, bp-Gina5bIWoIWzQB+pC5nmwQ@public.gmane.org, peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, acme-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, andihartmann-KuiJ5kEpwI6ELgA04lAiVw@public.gmane.org, labbott-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org List-Id: iommu@lists.linux-foundation.org From: Suravee Suthikulpanit First, this patch move arch/x86/events/amd/iommu.h to arch/x86/include/asm/perf/amd/iommu.h so that we easily include it in both perf-amd-iommu and amd-iommu drivers. Then, we consolidate declaration of AMD IOMMU performance counter APIs into one file. Reviewed-by: Joerg Roedel Signed-off-by: Suravee Suthikulpanit --- arch/x86/events/amd/iommu.c | 2 +- arch/x86/events/amd/iommu.h | 40 --------------------------------- arch/x86/include/asm/perf/amd/iommu.h | 42 +++++++++++++++++++++++++++++++++++ drivers/iommu/amd_iommu_init.c | 2 ++ drivers/iommu/amd_iommu_proto.h | 7 ------ 5 files changed, 45 insertions(+), 48 deletions(-) delete mode 100644 arch/x86/events/amd/iommu.h create mode 100644 arch/x86/include/asm/perf/amd/iommu.h diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c index 9da0d16..fb4aa7b 100644 --- a/arch/x86/events/amd/iommu.c +++ b/arch/x86/events/amd/iommu.c @@ -15,9 +15,9 @@ #include #include #include +#include #include "../../kernel/cpu/perf_event.h" -#include "iommu.h" #define COUNTER_SHIFT 16 diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h deleted file mode 100644 index 845d173..0000000 --- a/arch/x86/events/amd/iommu.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2013 Advanced Micro Devices, Inc. - * - * Author: Steven Kinney - * Author: Suravee Suthikulpanit - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _PERF_EVENT_AMD_IOMMU_H_ -#define _PERF_EVENT_AMD_IOMMU_H_ - -/* iommu pc mmio region register indexes */ -#define IOMMU_PC_COUNTER_REG 0x00 -#define IOMMU_PC_COUNTER_SRC_REG 0x08 -#define IOMMU_PC_PASID_MATCH_REG 0x10 -#define IOMMU_PC_DOMID_MATCH_REG 0x18 -#define IOMMU_PC_DEVID_MATCH_REG 0x20 -#define IOMMU_PC_COUNTER_REPORT_REG 0x28 - -/* maximun specified bank/counters */ -#define PC_MAX_SPEC_BNKS 64 -#define PC_MAX_SPEC_CNTRS 16 - -/* iommu pc reg masks*/ -#define IOMMU_BASE_DEVID 0x0000 - -/* amd_iommu_init.c external support functions */ -extern bool amd_iommu_pc_supported(void); - -extern u8 amd_iommu_pc_get_max_banks(u16 devid); - -extern u8 amd_iommu_pc_get_max_counters(u16 devid); - -extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, - u8 fxn, u64 *value, bool is_write); - -#endif /*_PERF_EVENT_AMD_IOMMU_H_*/ diff --git a/arch/x86/include/asm/perf/amd/iommu.h b/arch/x86/include/asm/perf/amd/iommu.h new file mode 100644 index 0000000..72f64b7 --- /dev/null +++ b/arch/x86/include/asm/perf/amd/iommu.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2013 Advanced Micro Devices, Inc. + * + * Author: Steven Kinney + * Author: Suravee Suthikulpanit + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _PERF_EVENT_AMD_IOMMU_H_ +#define _PERF_EVENT_AMD_IOMMU_H_ + +/* iommu pc mmio region register indexes */ +#define IOMMU_PC_COUNTER_REG 0x00 +#define IOMMU_PC_COUNTER_SRC_REG 0x08 +#define IOMMU_PC_PASID_MATCH_REG 0x10 +#define IOMMU_PC_DOMID_MATCH_REG 0x18 +#define IOMMU_PC_DEVID_MATCH_REG 0x20 +#define IOMMU_PC_COUNTER_REPORT_REG 0x28 + +/* maximum specified bank/counters */ +#define PC_MAX_SPEC_BNKS 64 +#define PC_MAX_SPEC_CNTRS 16 + +/* iommu pc reg masks*/ +#define IOMMU_BASE_DEVID 0x0000 + +/* amd_iommu_init.c external support functions */ +bool amd_iommu_pc_supported(void); + +u8 amd_iommu_pc_get_max_banks(u16 devid); + +u8 amd_iommu_pc_get_max_counters(u16 devid); + +int amd_iommu_pc_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, u64 *value); + +int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, + u64 *value, bool is_write); + +#endif /*_PERF_EVENT_AMD_IOMMU_H_*/ diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 013bdff..d30f4b2 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -27,6 +27,8 @@ #include #include #include +#include + #include #include #include diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h index 0bd9eb3..ac2da91 100644 --- a/drivers/iommu/amd_iommu_proto.h +++ b/drivers/iommu/amd_iommu_proto.h @@ -55,13 +55,6 @@ extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid); extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); -/* IOMMU Performance Counter functions */ -extern bool amd_iommu_pc_supported(void); -extern u8 amd_iommu_pc_get_max_banks(u16 devid); -extern u8 amd_iommu_pc_get_max_counters(u16 devid); -extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, - u64 *value, bool is_write); - #ifdef CONFIG_IRQ_REMAP extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu); #else -- 1.9.1