From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757330AbcCBCgm (ORCPT ); Tue, 1 Mar 2016 21:36:42 -0500 Received: from mx2.suse.de ([195.135.220.15]:38696 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752553AbcCBCfP (ORCPT ); Tue, 1 Mar 2016 21:35:15 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-meson@googlegroups.com Cc: Carlo Caione , linux-arm-kernel@lists.infradead.org, Matthias Brugger , Nicolas Saenz , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 4/6] ARM64: dts: Prepare configs for Amlogic Meson GXBaby Date: Wed, 2 Mar 2016 03:34:59 +0100 Message-Id: <1456886101-22967-5-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 2.6.2 In-Reply-To: <1456886101-22967-1-git-send-email-afaerber@suse.de> References: <1456886101-22967-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Andreas Färber --- v1 -> v2: * Adopted "arm,cortex-a53-pmu" compatible string (Sudeep) * Adopted "arm,gic-400" compatible string (André, Sudeep) * Adopted "arm,psci-0.2" compatible string and dropped functions (Sudeep) * Squashed GIC reg extension patch, enlarged one (André) * Squashed arch timer patch * Added uart nodes and aliases (from Vega S95 .dtsi) * Modeled cbus, aobus and apb arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/amlogic/Makefile | 3 + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 183 ++++++++++++++++++++++++++++ 3 files changed, 187 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/Makefile create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index fd80617a9c6f..330fae966cf3 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,6 +1,7 @@ dts-dirs += al dts-dirs += altera dts-dirs += amd +dts-dirs += amlogic dts-dirs += apm dts-dirs += arm dts-dirs += broadcom diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile new file mode 100644 index 000000000000..1b06c28c67eb --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -0,0 +1,3 @@ +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi new file mode 100644 index 000000000000..eaa0a4553734 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2016 Andreas Färber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +/ { + compatible = "amlogic,meson-gxbb"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus@c1100000 { + compatible = "simple-bus"; + reg = <0x0 0xc1100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; + + uart_A: serial@84c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x084c0 0x0 0x14>; + interrupts = ; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + gic: interrupt-controller@c4301000 { + compatible = "arm,gic-400"; + reg = <0x0 0xc4301000 0 0x1000>, + <0x0 0xc4302000 0 0x2000>, + <0x0 0xc4304000 0 0x2000>, + <0x0 0xc4306000 0 0x2000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + aobus: aobus@c8100000 { + compatible = "simple-bus"; + reg = <0x0 0xc8100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; + + uart_AO: serial@4c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x004c0 0x0 0x14>; + interrupts = ; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + apb: apb@d0000000 { + compatible = "simple-bus"; + reg = <0x0 0xd0000000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; + }; + }; +}; -- 2.6.2 From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v2 4/6] ARM64: dts: Prepare configs for Amlogic Meson GXBaby Date: Wed, 2 Mar 2016 03:34:59 +0100 Message-ID: <1456886101-22967-5-git-send-email-afaerber@suse.de> References: <1456886101-22967-1-git-send-email-afaerber@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <1456886101-22967-1-git-send-email-afaerber-l3A5Bk7waGM@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-meson-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Cc: Carlo Caione , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Matthias Brugger , Nicolas Saenz , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list List-Id: devicetree@vger.kernel.org Signed-off-by: Andreas F=C3=A4rber --- v1 -> v2: * Adopted "arm,cortex-a53-pmu" compatible string (Sudeep) * Adopted "arm,gic-400" compatible string (Andr=C3=A9, Sudeep) * Adopted "arm,psci-0.2" compatible string and dropped functions (Sude= ep) * Squashed GIC reg extension patch, enlarged one (Andr=C3=A9) * Squashed arch timer patch * Added uart nodes and aliases (from Vega S95 .dtsi) * Modeled cbus, aobus and apb =20 arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/amlogic/Makefile | 3 + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 183 ++++++++++++++++++++= ++++++++ 3 files changed, 187 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/Makefile create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefil= e index fd80617a9c6f..330fae966cf3 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,6 +1,7 @@ dts-dirs +=3D al dts-dirs +=3D altera dts-dirs +=3D amd +dts-dirs +=3D amlogic dts-dirs +=3D apm dts-dirs +=3D arm dts-dirs +=3D broadcom diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts= /amlogic/Makefile new file mode 100644 index 000000000000..1b06c28c67eb --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -0,0 +1,3 @@ +always :=3D $(dtb-y) +subdir-y :=3D $(dts-dirs) +clean-files :=3D *.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/b= oot/dts/amlogic/meson-gxbb.dtsi new file mode 100644 index 000000000000..eaa0a4553734 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2016 Andreas F=C3=A4rber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of = the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +/ { + compatible =3D "amlogic,meson-gxbb"; + interrupt-parent =3D <&gic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + aliases { + serial0 =3D &uart_AO; + serial1 =3D &uart_A; + }; + + cpus { + #address-cells =3D <0x2>; + #size-cells =3D <0x0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53", "arm,armv8"; + reg =3D <0x0 0x0>; + enable-method =3D "psci"; + }; + + cpu1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53", "arm,armv8"; + reg =3D <0x0 0x1>; + enable-method =3D "psci"; + }; + + cpu2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53", "arm,armv8"; + reg =3D <0x0 0x2>; + enable-method =3D "psci"; + }; + + cpu3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a53", "arm,armv8"; + reg =3D <0x0 0x3>; + enable-method =3D "psci"; + }; + }; + + arm-pmu { + compatible =3D "arm,cortex-a53-pmu"; + interrupts =3D , + , + , + ; + interrupt-affinity =3D <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible =3D "arm,psci-0.2"; + method =3D "smc"; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupts =3D , + , + , + ; + }; + + xtal: xtal-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <24000000>; + clock-output-names =3D "xtal"; + #clock-cells =3D <0>; + }; + + soc { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + cbus: cbus@c1100000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xc1100000 0x0 0x100000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; + + uart_A: serial@84c0 { + compatible =3D "amlogic,meson-uart"; + reg =3D <0x0 0x084c0 0x0 0x14>; + interrupts =3D ; + clocks =3D <&xtal>; + status =3D "disabled"; + }; + }; + + gic: interrupt-controller@c4301000 { + compatible =3D "arm,gic-400"; + reg =3D <0x0 0xc4301000 0 0x1000>, + <0x0 0xc4302000 0 0x2000>, + <0x0 0xc4304000 0 0x2000>, + <0x0 0xc4306000 0 0x2000>; + interrupt-controller; + interrupts =3D ; + #interrupt-cells =3D <3>; + #address-cells =3D <0>; + }; + + aobus: aobus@c8100000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xc8100000 0x0 0x100000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; + + uart_AO: serial@4c0 { + compatible =3D "amlogic,meson-uart"; + reg =3D <0x0 0x004c0 0x0 0x14>; + interrupts =3D ; + clocks =3D <&xtal>; + status =3D "disabled"; + }; + }; + + apb: apb@d0000000 { + compatible =3D "simple-bus"; + reg =3D <0x0 0xd0000000 0x0 0x200000>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; + }; + }; +}; --=20 2.6.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: afaerber@suse.de (=?UTF-8?q?Andreas=20F=C3=A4rber?=) Date: Wed, 2 Mar 2016 03:34:59 +0100 Subject: [PATCH v2 4/6] ARM64: dts: Prepare configs for Amlogic Meson GXBaby In-Reply-To: <1456886101-22967-1-git-send-email-afaerber@suse.de> References: <1456886101-22967-1-git-send-email-afaerber@suse.de> Message-ID: <1456886101-22967-5-git-send-email-afaerber@suse.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Signed-off-by: Andreas F?rber --- v1 -> v2: * Adopted "arm,cortex-a53-pmu" compatible string (Sudeep) * Adopted "arm,gic-400" compatible string (Andr?, Sudeep) * Adopted "arm,psci-0.2" compatible string and dropped functions (Sudeep) * Squashed GIC reg extension patch, enlarged one (Andr?) * Squashed arch timer patch * Added uart nodes and aliases (from Vega S95 .dtsi) * Modeled cbus, aobus and apb arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/amlogic/Makefile | 3 + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 183 ++++++++++++++++++++++++++++ 3 files changed, 187 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/Makefile create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index fd80617a9c6f..330fae966cf3 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,6 +1,7 @@ dts-dirs += al dts-dirs += altera dts-dirs += amd +dts-dirs += amlogic dts-dirs += apm dts-dirs += arm dts-dirs += broadcom diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile new file mode 100644 index 000000000000..1b06c28c67eb --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -0,0 +1,3 @@ +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi new file mode 100644 index 000000000000..eaa0a4553734 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2016 Andreas F?rber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include + +/ { + compatible = "amlogic,meson-gxbb"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + }; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + + cpu2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + enable-method = "psci"; + }; + + cpu3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + enable-method = "psci"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + cbus: cbus at c1100000 { + compatible = "simple-bus"; + reg = <0x0 0xc1100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; + + uart_A: serial at 84c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x084c0 0x0 0x14>; + interrupts = ; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + gic: interrupt-controller at c4301000 { + compatible = "arm,gic-400"; + reg = <0x0 0xc4301000 0 0x1000>, + <0x0 0xc4302000 0 0x2000>, + <0x0 0xc4304000 0 0x2000>, + <0x0 0xc4306000 0 0x2000>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <3>; + #address-cells = <0>; + }; + + aobus: aobus at c8100000 { + compatible = "simple-bus"; + reg = <0x0 0xc8100000 0x0 0x100000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; + + uart_AO: serial at 4c0 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x004c0 0x0 0x14>; + interrupts = ; + clocks = <&xtal>; + status = "disabled"; + }; + }; + + apb: apb at d0000000 { + compatible = "simple-bus"; + reg = <0x0 0xd0000000 0x0 0x200000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; + }; + }; +}; -- 2.6.2