From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Subject: [PATCH] ARM: dts: rockchip: update rk3288-veyron cpu operating points Date: Thu, 31 Mar 2016 23:24:43 +0200 Message-ID: <1459459483-5356-1-git-send-email-heiko@sntech.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Heiko Stuebner List-Id: linux-rockchip.vger.kernel.org The generic operating points specified in rk3288.dtsi are specified by Rockchip as conservative and for all cases. In contrast the Veyron ChromeOS devices are supposed to use a special chip variant often called rk3288-c and use different operating points in their kernel also including a higher max frequency. So override the operating points for veyron devices. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 274fa87..df7d70d 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -170,6 +170,22 @@ &cpu0 { cpu0-supply = <&vdd_cpu>; + operating-points = < + /* KHz uV */ + 1800000 1400000 + 1704000 1350000 + 1608000 1300000 + 1512000 1250000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 216000 900000 + 126000 900000 + >; }; &emmc { -- 2.1.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: heiko@sntech.de (Heiko Stuebner) Date: Thu, 31 Mar 2016 23:24:43 +0200 Subject: [PATCH] ARM: dts: rockchip: update rk3288-veyron cpu operating points Message-ID: <1459459483-5356-1-git-send-email-heiko@sntech.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The generic operating points specified in rk3288.dtsi are specified by Rockchip as conservative and for all cases. In contrast the Veyron ChromeOS devices are supposed to use a special chip variant often called rk3288-c and use different operating points in their kernel also including a higher max frequency. So override the operating points for veyron devices. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-veyron.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi index 274fa87..df7d70d 100644 --- a/arch/arm/boot/dts/rk3288-veyron.dtsi +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi @@ -170,6 +170,22 @@ &cpu0 { cpu0-supply = <&vdd_cpu>; + operating-points = < + /* KHz uV */ + 1800000 1400000 + 1704000 1350000 + 1608000 1300000 + 1512000 1250000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 216000 900000 + 126000 900000 + >; }; &emmc { -- 2.1.4