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From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Vinod Koul <vinod.koul@intel.com>,
	linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	ismo.puustinen@intel.com,
	Heikki Krogerus <heikki.krogerus@linux.intel.com>,
	linux-serial@vger.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 04/12] dmaengine: dw: override LLP support if asked in platform data
Date: Thu,  7 Apr 2016 23:37:05 +0300	[thread overview]
Message-ID: <1460061433-63750-5-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <1460061433-63750-1-git-send-email-andriy.shevchenko@linux.intel.com>

There is at least one known device, i.e. UART on Intel Galileo, that works
unreliably in case of use of multi block transfer support in DMA mode.

Override autodetection by user provided data.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/dma/dw/core.c                | 10 +++++++---
 include/linux/platform_data/dma-dw.h |  2 ++
 2 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index fc77f4e..0617880 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1631,9 +1631,13 @@ int dw_dma_probe(struct dw_dma_chip *chip)
 			dwc->block_size = pdata->block_size;
 
 			/* Check if channel supports multi block transfer */
-			channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
-			dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
-			channel_writel(dwc, LLP, 0);
+			if (pdata->is_nollp) {
+				dwc->nollp = pdata->is_nollp;
+			} else {
+				channel_writel(dwc, LLP, DWC_LLP_LOC(0xffffffff));
+				dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
+				channel_writel(dwc, LLP, 0);
+			}
 		}
 	}
 
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 6196139..8a9d132 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -40,6 +40,7 @@ struct dw_dma_slave {
  * @is_private: The device channels should be marked as private and not for
  *	by the general purpose DMA channel allocator.
  * @is_memcpy: The device channels do support memory-to-memory transfers.
+ * @is_nollp: The device channels does not support multi block transfers.
  * @chan_allocation_order: Allocate channels starting from 0 or 7
  * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
  * @block_size: Maximum block size supported by the controller
@@ -50,6 +51,7 @@ struct dw_dma_platform_data {
 	unsigned int	nr_channels;
 	bool		is_private;
 	bool		is_memcpy;
+	bool		is_nollp;
 #define CHAN_ALLOCATION_ASCENDING	0	/* zero to seven */
 #define CHAN_ALLOCATION_DESCENDING	1	/* seven to zero */
 	unsigned char	chan_allocation_order;
-- 
2.8.0.rc3

  parent reply	other threads:[~2016-04-07 20:39 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-07 20:37 [PATCH v1 00/12] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 01/12] dmaengine: dw: keep copy of custom slave config in dwc Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 02/12] dmaengine: dw: provide probe(), remove() stubs for users Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 03/12] dmaengine: dw: set polarity of handshake interface Andy Shevchenko
2016-04-07 20:37 ` Andy Shevchenko [this message]
2016-04-07 20:37 ` [PATCH v1 05/12] serial: 8250_dma: switch to new dmaengine_terminate_* API Andy Shevchenko
2016-04-07 23:55   ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 06/12] serial: 8250_dma: stop ongoing RX DMA on exception Andy Shevchenko
2016-04-07 23:54   ` Peter Hurley
2016-04-08  8:07     ` Andy Shevchenko
2016-04-08 23:20       ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 07/12] serial: 8250_dma: adjust DMA address of the UART Andy Shevchenko
2016-04-08  0:24   ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 08/12] serial: 8250: enable AFE on ports where FIFO is 16 bytes Andy Shevchenko
2016-04-07 23:43   ` Peter Hurley
2016-04-07 20:37 ` [PATCH v1 09/12] serial: 8250_lpss: split LPSS driver to separate module Andy Shevchenko
2016-04-08  1:42   ` Peter Hurley
2016-04-08  8:17     ` Andy Shevchenko
2016-04-08 22:44       ` Peter Hurley
2016-04-11 13:09         ` Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 10/12] serial: 8250_lpss: move Quark code from PCI driver Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 11/12] serial: 8250_lpss: enable MSI for Intel Quark Andy Shevchenko
2016-04-07 20:37 ` [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko
2016-04-11 15:33   ` Bryan O'Donoghue
2016-04-11 15:51     ` Andy Shevchenko
2016-04-11 16:05       ` Andy Shevchenko
2016-04-12 16:25       ` Bryan O'Donoghue
2016-04-12 16:50         ` Andy Shevchenko
2016-04-13 11:22           ` Bryan O'Donoghue
2016-04-13 12:03             ` Andy Shevchenko
2016-04-13 14:34               ` Bryan O'Donoghue
2016-04-13 14:48                 ` Andy Shevchenko
2016-04-13 15:24                   ` Bryan O'Donoghue
2016-04-09 16:53 ` [PATCH v1 00/12] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Bryan O'Donoghue
2016-04-09 17:48   ` Andy Shevchenko

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