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From: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Subject: [PATCH v2] drm/i915: Set crtc_state->lane_count for HDMI
Date: Mon, 11 Apr 2016 11:23:27 +0300	[thread overview]
Message-ID: <1460363007-3957-1-git-send-email-ander.conselvan.de.oliveira@intel.com> (raw)
In-Reply-To: <1460129506-6293-2-git-send-email-ander.conselvan.de.oliveira@intel.com>

Set the lane count for HDMI to 4. This will make it easier to
unduplicate CHV phy code.

v2: Set lane_count in *_get_config() to please state checker. (0day)
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c  | 1 +
 drivers/gpu/drm/i915/intel_hdmi.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 921edf1..96d7716 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1999,6 +1999,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
 	switch (temp & TRANS_DDI_MODE_SELECT_MASK) {
 	case TRANS_DDI_MODE_SELECT_HDMI:
 		pipe_config->has_hdmi_sink = true;
+		pipe_config->lane_count = 4;
 		intel_hdmi = enc_to_intel_hdmi(&encoder->base);
 
 		if (intel_hdmi->infoframe_enabled(&encoder->base, pipe_config))
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index b199ede..80d9841 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -953,6 +953,8 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
 		dotclock /= pipe_config->pixel_multiplier;
 
 	pipe_config->base.adjusted_mode.crtc_clock = dotclock;
+
+	pipe_config->lane_count = 4;
 }
 
 static void intel_enable_hdmi_audio(struct intel_encoder *encoder)
@@ -1337,6 +1339,8 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
 	/* Set user selected PAR to incoming mode's member */
 	adjusted_mode->picture_aspect_ratio = intel_hdmi->aspect_ratio;
 
+	pipe_config->lane_count = 4;
+
 	return true;
 }
 
-- 
2.4.11

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  reply	other threads:[~2016-04-11  8:23 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-08 15:31 [PATCH 0/6] Unduplicate CHV phy code Ander Conselvan de Oliveira
2016-04-08 15:31 ` [PATCH 1/6] drm/i915: Set crtc_state->lane_count for HDMI Ander Conselvan de Oliveira
2016-04-11  8:23   ` Ander Conselvan de Oliveira [this message]
2016-04-08 15:31 ` [PATCH 2/6] drm/i915: Unduplicate CHV signal level code Ander Conselvan de Oliveira
2016-04-11 15:09   ` Ville Syrjälä
2016-04-08 15:31 ` [PATCH 3/6] drm/i915: Unduplicate chv_data_lane_soft_reset() Ander Conselvan de Oliveira
2016-04-08 15:31 ` [PATCH 4/6] drm/i915: Unduplicate CHV phy-releated pre pll enabling code Ander Conselvan de Oliveira
2016-04-08 15:31 ` [PATCH 5/6] drm/i915: Unduplicate CHV pre-encoder enabling phy logic Ander Conselvan de Oliveira
2016-04-11 15:13   ` Ville Syrjälä
2016-04-08 15:31 ` [PATCH 6/6] drm/i915: Undiplicate CHV encoders' post pll disable code Ander Conselvan de Oliveira
2016-04-11  8:58 ` ✗ Fi.CI.BAT: failure for Unduplicate CHV phy code (rev2) Patchwork

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