From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Abraham Date: Wed, 13 Apr 2016 16:13:39 +0530 Subject: [U-Boot] [PATCH 6/9] serial: s5p: use clock api to get clock rate In-Reply-To: <1460544222-5342-1-git-send-email-ta.omasab@gmail.com> References: <1460544222-5342-1-git-send-email-ta.omasab@gmail.com> Message-ID: <1460544222-5342-7-git-send-email-ta.omasab@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Thomas Abraham On Exynos platforms that support clock driver API, allow the driver to use clock api get the SCLK clock rate. Cc: Minkyu Kang Signed-off-by: Thomas Abraham --- drivers/serial/serial_s5p.c | 15 ++++++++++++++- 1 files changed, 14 insertions(+), 1 deletions(-) diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c index 038d9b6..cf5b4f0 100644 --- a/drivers/serial/serial_s5p.c +++ b/drivers/serial/serial_s5p.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -90,7 +91,19 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate) { struct s5p_serial_platdata *plat = dev->platdata; struct s5p_uart *const uart = plat->reg; - u32 uclk = get_uart_clk(plat->port_id); + u32 uclk; + +#ifdef CONFIG_CLK_EXYNOS + struct udevice *clk_dev; + u32 ret; + + ret = clk_get_by_index(dev, 1, &clk_dev); + if (ret < 0) + return ret; + uclk = clk_get_periph_rate(clk_dev, ret); +#else + uclk = get_uart_clk(plat->port_id); +#endif s5p_serial_baud(uart, uclk, baudrate); -- 1.6.6.rc2