From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 19 Apr 2016 14:58:51 -0600 Subject: [U-Boot] [PATCH 11/60] ARM: tegra: add DT alias for GPIO controller In-Reply-To: <1461099580-3866-1-git-send-email-swarren@wwwdotorg.org> References: <1461099580-3866-1-git-send-email-swarren@wwwdotorg.org> Message-ID: <1461099580-3866-12-git-send-email-swarren@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Stephen Warren Future Tegra chips contain multiple entirely separate GPIO controllers. It is plausible that boards using those chips will end up with non-DT-driven code that manipulates GPIOs, just like a few Tegra boards do today. In that case, we'll want to make sure that the mapping from the global integer GPIO numbering to GPIO controller occurs in a defined order, so that the right GPIO is chosen in each case. To guarantee that order, GPIO controllers must have specific DM "seq" values. This can be ensured via DT aliases. This is a no-op for current chips since there's only one GPIO controller. However, it provides a good example for cargo-cult programming:-) The aliases are added to the SoC DTSI files since there is no need for them to vary between boards, and doing so avoids having to duplicate the entry in each board's DT file. Any additional board-specific GPIO controllers can be referenced by additional aliases (starting at 1) in board DT files if needed. Signed-off-by: Stephen Warren --- arch/arm/dts/tegra114.dtsi | 4 ++++ arch/arm/dts/tegra20.dtsi | 4 ++++ arch/arm/dts/tegra210.dtsi | 4 ++++ arch/arm/dts/tegra30.dtsi | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index 88bdc4904508..fd43cb1805aa 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -7,6 +7,10 @@ / { compatible = "nvidia,tegra114"; + aliases { + gpio0 = "/gpio at 6000d000"; + }; + tegra_car: clock { compatible = "nvidia,tegra114-car"; reg = <0x60006000 0x1000>; diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index 31223e4fc9aa..fd1197e73d30 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -9,6 +9,10 @@ compatible = "nvidia,tegra20"; interrupt-parent = <&lic>; + aliases { + gpio0 = "/gpio at 6000d000"; + }; + host1x at 50000000 { u-boot,dm-pre-reloc; compatible = "nvidia,tegra20-host1x", "simple-bus"; diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi index fd4cc793d906..8f6a30851e21 100644 --- a/arch/arm/dts/tegra210.dtsi +++ b/arch/arm/dts/tegra210.dtsi @@ -12,6 +12,10 @@ #address-cells = <2>; #size-cells = <2>; + aliases { + gpio0 = "/gpio at 6000d000"; + }; + pcie-controller at 01003000 { compatible = "nvidia,tegra210-pcie"; device_type = "pci"; diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index 5ea7e347f3fa..f6d4fd54d4f3 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -8,6 +8,10 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&intc>; + aliases { + gpio0 = "/gpio at 6000d000"; + }; + intc: interrupt-controller at 50041000 { compatible = "arm,cortex-a9-gic"; reg = <0x50041000 0x1000 -- 2.8.1