From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 19 Apr 2016 14:59:09 -0600 Subject: [U-Boot] [PATCH 29/60] ARM: tegra: move sysctr.h In-Reply-To: <1461099580-3866-1-git-send-email-swarren@wwwdotorg.org> References: <1461099580-3866-1-git-send-email-swarren@wwwdotorg.org> Message-ID: <1461099580-3866-30-git-send-email-swarren@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Stephen Warren This header is only needed by code local to mach-tegra, so move it there to avoid polluting the global include path. Also, unify the 3 identical copies of the file into one. Signed-off-by: Stephen Warren --- arch/arm/include/asm/arch-tegra124/sysctr.h | 26 ---------------------- arch/arm/include/asm/arch-tegra210/sysctr.h | 26 ---------------------- .../asm/arch-tegra114 => mach-tegra}/sysctr.h | 8 +++---- arch/arm/mach-tegra/tegra114/clock.c | 2 +- arch/arm/mach-tegra/tegra124/clock.c | 2 +- arch/arm/mach-tegra/tegra210/clock.c | 2 +- 6 files changed, 7 insertions(+), 59 deletions(-) delete mode 100644 arch/arm/include/asm/arch-tegra124/sysctr.h delete mode 100644 arch/arm/include/asm/arch-tegra210/sysctr.h rename arch/arm/{include/asm/arch-tegra114 => mach-tegra}/sysctr.h (81%) diff --git a/arch/arm/include/asm/arch-tegra124/sysctr.h b/arch/arm/include/asm/arch-tegra124/sysctr.h deleted file mode 100644 index 3f0309b78fae..000000000000 --- a/arch/arm/include/asm/arch-tegra124/sysctr.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * (C) Copyright 2013 - * NVIDIA Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _TEGRA124_SYSCTR_H_ -#define _TEGRA124_SYSCTR_H_ - -struct sysctr_ctlr { - u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ - u32 cntsr; /* 0x04: SYSCTR0_CNTSR Counter Status */ - u32 cntcv0; /* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 */ - u32 cntcv1; /* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 */ - u32 reserved1[4]; /* 0x10 - 0x1C */ - u32 cntfid0; /* 0x20: SYSCTR0_CNTFID0 Freq Table Entry */ - u32 cntfid1; /* 0x24: SYSCTR0_CNTFID1 Freq Table End */ - u32 reserved2[1002]; /* 0x28 - 0xFCC */ - u32 counterid[12]; /* 0xFD0 - 0xFxx CounterID regs, RO */ -}; - -#define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ -#define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ - -#endif /* _TEGRA124_SYSCTR_H_ */ diff --git a/arch/arm/include/asm/arch-tegra210/sysctr.h b/arch/arm/include/asm/arch-tegra210/sysctr.h deleted file mode 100644 index e8a13b502a6d..000000000000 --- a/arch/arm/include/asm/arch-tegra210/sysctr.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * (C) Copyright 2013-2015 - * NVIDIA Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _TEGRA210_SYSCTR_H_ -#define _TEGRA210_SYSCTR_H_ - -struct sysctr_ctlr { - u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ - u32 cntsr; /* 0x04: SYSCTR0_CNTSR Counter Status */ - u32 cntcv0; /* 0x08: SYSCTR0_CNTCV0 Counter Count 31:00 */ - u32 cntcv1; /* 0x0C: SYSCTR0_CNTCV1 Counter Count 63:32 */ - u32 reserved1[4]; /* 0x10 - 0x1C */ - u32 cntfid0; /* 0x20: SYSCTR0_CNTFID0 Freq Table Entry */ - u32 cntfid1; /* 0x24: SYSCTR0_CNTFID1 Freq Table End */ - u32 reserved2[1002]; /* 0x28 - 0xFCC */ - u32 counterid[12]; /* 0xFD0 - 0xFxx CounterID regs, RO */ -}; - -#define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ -#define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ - -#endif /* _TEGRA210_SYSCTR_H_ */ diff --git a/arch/arm/include/asm/arch-tegra114/sysctr.h b/arch/arm/mach-tegra/sysctr.h similarity index 81% rename from arch/arm/include/asm/arch-tegra114/sysctr.h rename to arch/arm/mach-tegra/sysctr.h index 38220aac8eed..27930d1c3240 100644 --- a/arch/arm/include/asm/arch-tegra114/sysctr.h +++ b/arch/arm/mach-tegra/sysctr.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013-2016, NVIDIA CORPORATION. All rights reserved. * * SPDX-License-Identifier: GPL-2.0 */ -#ifndef _TEGRA114_SYSCTR_H_ -#define _TEGRA114_SYSCTR_H_ +#ifndef _TEGRA_SYSCTR_H +#define _TEGRA_SYSCTR_H struct sysctr_ctlr { u32 cntcr; /* 0x00: SYSCTR0_CNTCR Counter Control */ @@ -22,4 +22,4 @@ struct sysctr_ctlr { #define TSC_CNTCR_ENABLE (1 << 0) /* Enable */ #define TSC_CNTCR_HDBG (1 << 1) /* Halt on debug */ -#endif /* _TEGRA114_SYSCTR_H_ */ +#endif diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index 7a73e159a7cd..155353d44c52 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -10,11 +10,11 @@ #include #include #include -#include #include #include #include #include +#include "../sysctr.h" /* * Clock types that we can use as a source. The Tegra114 has muxes for the diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 1219b6413844..dc060a6db569 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -10,11 +10,11 @@ #include #include #include -#include #include #include #include #include +#include "../sysctr.h" /* * Clock types that we can use as a source. The Tegra124 has muxes for the diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index b025711acf09..d2d517b2c711 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -11,11 +11,11 @@ #include #include #include -#include #include #include #include #include +#include "../sysctr.h" /* * Clock types that we can use as a source. The Tegra210 has muxes for the -- 2.8.1