From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 19 Apr 2016 14:59:22 -0600 Subject: [U-Boot] [PATCH 42/60] ARM: tegra: move EMC code to tegra20/ directory In-Reply-To: <1461099580-3866-1-git-send-email-swarren@wwwdotorg.org> References: <1461099580-3866-1-git-send-email-swarren@wwwdotorg.org> Message-ID: <1461099580-3866-43-git-send-email-swarren@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Stephen Warren EMC scaling is specific to Tegra20. Move the code into tegra20/ to isolate it. If it becomes more generic in the future, it should likely be moved somewhere in drivers/, but at the least be reworked to have a leaner and cleaner interface to its caller (i.e. fewer dependencies, interactions). Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Makefile | 1 - arch/arm/mach-tegra/board2.c | 6 ++++-- arch/arm/mach-tegra/emc.c | 36 ---------------------------------- arch/arm/mach-tegra/emc.h | 27 ------------------------- arch/arm/mach-tegra/tegra20/Makefile | 4 ++-- arch/arm/mach-tegra/tegra20/emc.c | 34 +++++++++++++++++++++++++++++++- arch/arm/mach-tegra/tegra20/emc.h | 14 +++++++++++++ arch/arm/mach-tegra/tegra20/warmboot.c | 4 ++-- include/configs/seaboard.h | 4 ++-- 9 files changed, 57 insertions(+), 73 deletions(-) delete mode 100644 arch/arm/mach-tegra/emc.c delete mode 100644 arch/arm/mach-tegra/emc.h create mode 100644 arch/arm/mach-tegra/tegra20/emc.h diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 197bdfeadd57..f1c1f84fc933 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -25,7 +25,6 @@ obj-y += powergate.o obj-y += xusb-padctl-dummy.o obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o obj-$(CONFIG_TEGRA_GPU) += gpu.o -obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o obj-$(CONFIG_SPL_BUILD) += i2c_early.o ifndef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 684d4a5ad853..c3e6fbf2a5a4 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -30,9 +30,11 @@ #include #include #include "cpu.h" -#include "emc.h" #include "gpu.h" #include "pmc.h" +#ifdef CONFIG_TEGRA20_CLOCK_SCALING +#include "tegra20/emc.h" +#endif #ifdef CONFIG_TEGRA_LP0 #include "tegra20/warmboot.h" #endif @@ -136,7 +138,7 @@ int board_init(void) # ifdef CONFIG_TEGRA_PMU if (pmu_set_nominal()) debug("Failed to select nominal voltages\n"); -# ifdef CONFIG_TEGRA_CLOCK_SCALING +# ifdef CONFIG_TEGRA20_CLOCK_SCALING err = board_emc_init(); if (err) debug("Memory controller init failed: %d\n", err); diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c deleted file mode 100644 index 86aba51e398e..000000000000 --- a/arch/arm/mach-tegra/emc.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include "emc.h" -#include "cpu.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* These rates are hard-coded for now, until fdt provides them */ -#define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000) -#define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000) - -int board_emc_init(void) -{ - unsigned rate; - - switch (tegra_get_chip_sku()) { - default: - case TEGRA_SOC_T20: - rate = EMC_SDRAM_RATE_T20; - break; - case TEGRA_SOC_T25: - rate = EMC_SDRAM_RATE_T25; - break; - } - return tegra_set_emc(gd->fdt_blob, rate); -} diff --git a/arch/arm/mach-tegra/emc.h b/arch/arm/mach-tegra/emc.h deleted file mode 100644 index 19527b67031e..000000000000 --- a/arch/arm/mach-tegra/emc.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010-2016 NVIDIA Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _TEGRA_EMC_H -#define _TEGRA_EMC_H - -/* Implemented in SoC-agnostic EMC code, called by core board code */ -int board_emc_init(void); - -/** - * Set up the EMC for the given rate. The timing parameters are retrieved - * from the device tree "nvidia,tegra20-emc" node and its - * "nvidia,tegra20-emc-table" sub-nodes. - * - * @param blob Device tree blob - * @param rate Clock speed of memory controller in Hz (=2x memory bus rate) - * @return 0 if ok, else -ve error code (look in emc.c to decode it) - * - * Implemented by SoC-specific code. - */ -int tegra_set_emc(const void *blob, unsigned rate); - -#endif diff --git a/arch/arm/mach-tegra/tegra20/Makefile b/arch/arm/mach-tegra/tegra20/Makefile index 17c19900e216..3cf1e7f113ce 100644 --- a/arch/arm/mach-tegra/tegra20/Makefile +++ b/arch/arm/mach-tegra/tegra20/Makefile @@ -1,5 +1,5 @@ # -# (C) Copyright 2010,2011 Nvidia Corporation. +# (C) Copyright 2010-2016 Nvidia Corporation. # # SPDX-License-Identifier: GPL-2.0+ # @@ -14,5 +14,5 @@ CFLAGS_warmboot_avp.o += -march=armv4t obj-y += clock.o funcmux.o pinmux.o obj-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o -obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o +obj-$(CONFIG_TEGRA20_CLOCK_SCALING) += emc.o obj-$(CONFIG_TEGRA_PMU) += pmu.o diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c index c2569418ba9f..242defde00a6 100644 --- a/arch/arm/mach-tegra/tegra20/emc.c +++ b/arch/arm/mach-tegra/tegra20/emc.c @@ -11,9 +11,12 @@ #include #include #include "../apb_misc.h" +#include "../cpu.h" #include "../emc.h" #include "emc_priv.h" +DECLARE_GLOBAL_DATA_PTR; + /* * The EMC registers have shadow registers. When the EMC clock is updated * in the clock controller, the shadow registers are copied to the active @@ -239,7 +242,16 @@ static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp, return 0; } -int tegra_set_emc(const void *blob, unsigned rate) +/** + * Set up the EMC for the given rate. The timing parameters are retrieved + * from the device tree "nvidia,tegra20-emc" node and its + * "nvidia,tegra20-emc-table" sub-nodes. + * + * @param blob Device tree blob + * @param rate Clock speed of memory controller in Hz (=2x memory bus rate) + * @return 0 if ok, else -ve error code (look in emc.c to decode it) + */ +static int tegra_set_emc(const void *blob, unsigned rate) { struct emc_ctlr *emc; const u32 *table = NULL; @@ -269,3 +281,23 @@ int tegra_set_emc(const void *blob, unsigned rate) return 0; } + +/* These rates are hard-coded for now, until fdt provides them */ +#define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000) +#define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000) + +int board_emc_init(void) +{ + unsigned rate; + + switch (tegra_get_chip_sku()) { + default: + case TEGRA_SOC_T20: + rate = EMC_SDRAM_RATE_T20; + break; + case TEGRA_SOC_T25: + rate = EMC_SDRAM_RATE_T25; + break; + } + return tegra_set_emc(gd->fdt_blob, rate); +} diff --git a/arch/arm/mach-tegra/tegra20/emc.h b/arch/arm/mach-tegra/tegra20/emc.h new file mode 100644 index 000000000000..f660113e6b0a --- /dev/null +++ b/arch/arm/mach-tegra/tegra20/emc.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010,2011 NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA20_EMC_H +#define _TEGRA20_EMC_H + +/* Implemented in SoC-specific EMC code, called by core board code */ +int board_emc_init(void); + +#endif diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c index dd3da116faef..d5f7e96eb07e 100644 --- a/arch/arm/mach-tegra/tegra20/warmboot.c +++ b/arch/arm/mach-tegra/tegra20/warmboot.c @@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_TEGRA_CLOCK_SCALING -#error "You must enable CONFIG_TEGRA_CLOCK_SCALING to use CONFIG_TEGRA_LP0" +#ifndef CONFIG_TEGRA20_CLOCK_SCALING +#error "You must enable CONFIG_TEGRA20_CLOCK_SCALING to use CONFIG_TEGRA_LP0" #endif /* diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 06112139ea8f..09509b45f993 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2010,2011 + * (C) Copyright 2010-2016 * NVIDIA Corporation * * SPDX-License-Identifier: GPL-2.0+ @@ -15,7 +15,7 @@ #define CONFIG_AES #define CONFIG_TEGRA_PMU #define CONFIG_TPS6586X_POWER -#define CONFIG_TEGRA_CLOCK_SCALING +#define CONFIG_TEGRA20_CLOCK_SCALING #include "tegra20-common.h" -- 2.8.1