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From: "Sinclair Yeh" <syeh@vmware.com>
To: dri-devel@lists.freedesktop.org
Cc: thellstrom@vmware.com
Subject: [PATCH 3/3] drm/vmwgfx: Fix order of operation
Date: Wed, 27 Apr 2016 09:43:35 -0700	[thread overview]
Message-ID: <1461775415-7872-1-git-send-email-syeh@vmware.com> (raw)

mode->hdisplay * (var->bits_per_pixel + 7) gets evaluated before
the division, potentially making the pitch larger than it should
be.

Since the original intention is to do a div-round-up, just use
the macro instead.

Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
---
 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index 3b1faf7..679a4cb 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -573,9 +573,9 @@ static int vmw_fb_set_par(struct fb_info *info)
 		mode = old_mode;
 		old_mode = NULL;
 	} else if (!vmw_kms_validate_mode_vram(vmw_priv,
-					       mode->hdisplay *
-					       (var->bits_per_pixel + 7) / 8,
-					       mode->vdisplay)) {
+					mode->hdisplay *
+					DIV_ROUND_UP(var->bits_per_pixel, 8),
+					mode->vdisplay)) {
 		drm_mode_destroy(vmw_priv->dev, mode);
 		return -EINVAL;
 	}
-- 
1.9.1

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             reply	other threads:[~2016-04-27 16:44 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-27 16:43 Sinclair Yeh [this message]
  -- strict thread matches above, loose matches on Subject: below --
2016-05-31 18:17 [PATCH 1/3] drm/vmwgfx: Enable SVGA_3D_CMD_DX_SET_PREDICATION Sinclair Yeh
2016-05-31 18:17 ` [PATCH 3/3] drm/vmwgfx: Fix order of operation Sinclair Yeh
2016-04-27 15:59 [PATCH 1/3] drm/vmwgfx: Enable SVGA_3D_CMD_DX_SET_PREDICATION Sinclair Yeh
2016-04-27 15:59 ` [PATCH 3/3] drm/vmwgfx: Fix order of operation Sinclair Yeh

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