[PATCH 1/2] drm/i915/lvds: separate border enable readout from panel fitter

[PATCH 1/2] drm/i915/lvds: separate border enable readout from panel fitter

[Jani Nikula]

The LVDS border enable is independent from the panel fitter. Move the
readout of the "border bits" from i9xx_get_pfit_config() to
intel_lvds_get_config(), where it will be read if LVDS is enabled even
if the panel fitter is not.

This fixes the state checker warning:

[drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in
gmch_pfit.lvds_border_bits (expected 0x00008000, found 0x00000000)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87632
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ---
 drivers/gpu/drm/i915/intel_lvds.c    | 4 ++++
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5ffccf6e7f36..0fccebbd41a3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8022,9 +8022,6 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
 
 	pipe_config->gmch_pfit.control = tmp;
 	pipe_config->gmch_pfit.pgm_ratios = I915_READ(PFIT_PGM_RATIOS);
-	if (INTEL_INFO(dev)->gen < 5)
-		pipe_config->gmch_pfit.lvds_border_bits =
-			I915_READ(LVDS) & LVDS_BORDER_ENABLE;
 }
 
 static void vlv_crtc_clock_get(struct intel_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 66e832beeb37..bc53c0dd34d0 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -122,6 +122,10 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
 
 	pipe_config->base.adjusted_mode.flags |= flags;
 
+	if (INTEL_INFO(dev)->gen < 5)
+		pipe_config->gmch_pfit.lvds_border_bits =
+			tmp & LVDS_BORDER_ENABLE;
+
 	/* gen2/3 store dither state in pfit control, needs to match */
 	if (INTEL_INFO(dev)->gen < 4) {
 		tmp = I915_READ(PFIT_CONTROL);
-- 
2.1.4

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[PATCH 2/2] drm/i915: do not set border enable software state for VLV/CHV

[Jani Nikula]

VLV/CHV use intel_gmch_panel_fitting() for eDP and DSI. They don't use
the border enable software state for anything, so don't set it
either. This should avoid a state checker warning on lvds_border_bits,
although one hasn't been spotted in the wild.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_panel.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 828f0fcaaaf8..d0606b8714a4 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -371,7 +371,8 @@ out:
 
 	pipe_config->gmch_pfit.control = pfit_control;
 	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
-	pipe_config->gmch_pfit.lvds_border_bits = border;
+	if (INTEL_INFO(dev)->gen < 5)
+		pipe_config->gmch_pfit.lvds_border_bits = border;
 }
 
 enum drm_connector_status
-- 
2.1.4

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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/lvds: separate border enable readout from panel fitter

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/lvds: separate border enable readout from panel fitter
URL   : https://patchwork.freedesktop.org/series/6535/
State : success

== Summary ==

Series 6535v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/6535/revisions/1/mbox/


bdw-nuci7-2      total:201  pass:189  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:201  pass:176  dwarn:0   dfail:0   fail:0   skip:25 
bsw-nuc-2        total:200  pass:159  dwarn:0   dfail:0   fail:0   skip:41 
byt-nuc          total:200  pass:159  dwarn:0   dfail:0   fail:0   skip:41 
hsw-brixbox      total:201  pass:175  dwarn:0   dfail:0   fail:0   skip:26 
hsw-gt2          total:201  pass:179  dwarn:0   dfail:0   fail:1   skip:21 
ilk-hp8440p      total:201  pass:140  dwarn:0   dfail:0   fail:0   skip:61 
ivb-t430s        total:201  pass:170  dwarn:0   dfail:0   fail:0   skip:31 
skl-i7k-2        total:201  pass:174  dwarn:0   dfail:0   fail:0   skip:27 
skl-nuci5        total:201  pass:190  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:201  pass:159  dwarn:0   dfail:0   fail:0   skip:42 
snb-x220t        total:201  pass:159  dwarn:0   dfail:0   fail:1   skip:41 

Results at /archive/results/CI_IGT_test/Patchwork_2114/

1d56af10bdd6f4714e0892c05ff01d11e77f54fc drm-intel-nightly: 2016y-04m-29d-09h-21m-52s UTC integration manifest
b1884d4 drm/i915: do not set border enable software state for VLV/CHV
7a750ca drm/i915/lvds: separate border enable readout from panel fitter

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Re: [PATCH 2/2] drm/i915: do not set border enable software state for VLV/CHV

[Ville Syrjälä]

On Fri, Apr 29, 2016 at 03:34:03PM +0300, Jani Nikula wrote:
> VLV/CHV use intel_gmch_panel_fitting() for eDP and DSI. They don't use
> the border enable software state for anything, so don't set it
> either. This should avoid a state checker warning on lvds_border_bits,
> although one hasn't been spotted in the wild.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_panel.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index 828f0fcaaaf8..d0606b8714a4 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -371,7 +371,8 @@ out:
>  
>  	pipe_config->gmch_pfit.control = pfit_control;
>  	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
> -	pipe_config->gmch_pfit.lvds_border_bits = border;
> +	if (INTEL_INFO(dev)->gen < 5)
> +		pipe_config->gmch_pfit.lvds_border_bits = border;

Shouldn't actually be needed since we reject the "center" scaling mode
on eDP and DSI, and that's the only one to use the border bit on gen4+.
So no way to get here w/ border!=0 on VLV/CHV I think.

>  }
>  
>  enum drm_connector_status
> -- 
> 2.1.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 1/2] drm/i915/lvds: separate border enable readout from panel fitter

[Ville Syrjälä]

On Fri, Apr 29, 2016 at 03:34:02PM +0300, Jani Nikula wrote:
> The LVDS border enable is independent from the panel fitter. Move the
> readout of the "border bits" from i9xx_get_pfit_config() to
> intel_lvds_get_config(), where it will be read if LVDS is enabled even
> if the panel fitter is not.
> 
> This fixes the state checker warning:
> 
> [drm:intel_pipe_config_compare [i915]] *ERROR* mismatch in
> gmch_pfit.lvds_border_bits (expected 0x00008000, found 0x00000000)
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87632
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Makes sense to me

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 3 ---
>  drivers/gpu/drm/i915/intel_lvds.c    | 4 ++++
>  2 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5ffccf6e7f36..0fccebbd41a3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -8022,9 +8022,6 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
>  
>  	pipe_config->gmch_pfit.control = tmp;
>  	pipe_config->gmch_pfit.pgm_ratios = I915_READ(PFIT_PGM_RATIOS);
> -	if (INTEL_INFO(dev)->gen < 5)
> -		pipe_config->gmch_pfit.lvds_border_bits =
> -			I915_READ(LVDS) & LVDS_BORDER_ENABLE;
>  }
>  
>  static void vlv_crtc_clock_get(struct intel_crtc *crtc,
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index 66e832beeb37..bc53c0dd34d0 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -122,6 +122,10 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
>  
>  	pipe_config->base.adjusted_mode.flags |= flags;
>  
> +	if (INTEL_INFO(dev)->gen < 5)
> +		pipe_config->gmch_pfit.lvds_border_bits =
> +			tmp & LVDS_BORDER_ENABLE;
> +
>  	/* gen2/3 store dither state in pfit control, needs to match */
>  	if (INTEL_INFO(dev)->gen < 4) {
>  		tmp = I915_READ(PFIT_CONTROL);
> -- 
> 2.1.4

-- 
Ville Syrjälä
Intel OTC
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Re: [PATCH 2/2] drm/i915: do not set border enable software state for VLV/CHV

[Jani Nikula]

On Fri, 29 Apr 2016, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Apr 29, 2016 at 03:34:03PM +0300, Jani Nikula wrote:
>> VLV/CHV use intel_gmch_panel_fitting() for eDP and DSI. They don't use
>> the border enable software state for anything, so don't set it
>> either. This should avoid a state checker warning on lvds_border_bits,
>> although one hasn't been spotted in the wild.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_panel.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
>> index 828f0fcaaaf8..d0606b8714a4 100644
>> --- a/drivers/gpu/drm/i915/intel_panel.c
>> +++ b/drivers/gpu/drm/i915/intel_panel.c
>> @@ -371,7 +371,8 @@ out:
>>  
>>  	pipe_config->gmch_pfit.control = pfit_control;
>>  	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
>> -	pipe_config->gmch_pfit.lvds_border_bits = border;
>> +	if (INTEL_INFO(dev)->gen < 5)
>> +		pipe_config->gmch_pfit.lvds_border_bits = border;
>
> Shouldn't actually be needed since we reject the "center" scaling mode
> on eDP and DSI, and that's the only one to use the border bit on gen4+.
> So no way to get here w/ border!=0 on VLV/CHV I think.

Right. It's more than a little tricky to check all the places to make
sure...

BR,
Jani.

>
>>  }
>>  
>>  enum drm_connector_status
>> -- 
>> 2.1.4
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center
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