From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Thu, 5 May 2016 07:28:07 -0600 Subject: [U-Boot] [PATCH v2 03/18] bootm: Align cache flush end address correctly In-Reply-To: <1462454902-6093-1-git-send-email-sjg@chromium.org> References: <1462454902-6093-1-git-send-email-sjg@chromium.org> Message-ID: <1462454902-6093-4-git-send-email-sjg@chromium.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Flushing part of the cache should be done on cache boundaries. Trying to flush part of a cache line is not supported and the request may be ignored or print warnings. Adjust the bootm code to align the end address to prevent this problem. Signed-off-by: Simon Glass Reviewed-by: Heiko Schocher Tested-on: smartweb, corvus, taurus, axm Tested-by: Heiko Schocher Reviewed-by: Joe Hershberger --- Changes in v2: None common/bootm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/bootm.c b/common/bootm.c index c965326..7469c61 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -435,7 +435,7 @@ static int bootm_load_os(bootm_headers_t *images, unsigned long *load_end, bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE); return err; } - flush_cache(load, *load_end - load); + flush_cache(load, ALIGN(*load_end - load, ARCH_DMA_MINALIGN)); debug(" kernel loaded at 0x%08lx, end = 0x%08lx\n", load, *load_end); bootstage_mark(BOOTSTAGE_ID_KERNEL_LOADED); -- 2.8.0.rc3.226.g39d4020