All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chen-Yu Tsai <wens@csie.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 05/10] sunxi: Make CPUCFG_BASE macro names the same across families
Date: Mon, 23 May 2016 20:41:41 +0800	[thread overview]
Message-ID: <1464007306-30269-6-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1464007306-30269-1-git-send-email-wens@csie.org>

Use SUNXI_CPUCFG_BASE across all families. This makes writing common
PSCI code easier.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/cpu/armv7/sunxi/psci_sun6i.S       | 16 ++++++++--------
 arch/arm/cpu/armv7/sunxi/psci_sun7i.S       |  8 ++++----
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 15 +++++++++++++--
 3 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
index 90b5bfd35947..9752550dea35 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
@@ -73,8 +73,8 @@ psci_fiq_enter:
 	lsr	r9, r9, #10
 	and	r9, r9, #0xf
 
-	movw	r8, #(SUN6I_CPUCFG_BASE & 0xffff)
-	movt	r8, #(SUN6I_CPUCFG_BASE >> 16)
+	movw	r8, #(SUNXI_CPUCFG_BASE & 0xffff)
+	movt	r8, #(SUNXI_CPUCFG_BASE >> 16)
 
 	@ Wait for the core to enter WFI
 	lsl	r11, r9, #6		@ x64
@@ -114,8 +114,8 @@ psci_fiq_enter:
 	str	r10, [r12, #0x140]
 #endif
 
-	movw	r8, #(SUN6I_CPUCFG_BASE & 0xffff)
-	movt	r8, #(SUN6I_CPUCFG_BASE >> 16)
+	movw	r8, #(SUNXI_CPUCFG_BASE & 0xffff)
+	movt	r8, #(SUNXI_CPUCFG_BASE >> 16)
 
 	@ Unlock CPU
 	ldr	r10, [r8, #0x1e4]
@@ -139,8 +139,8 @@ psci_cpu_on:
 	str	r2, [r0]		@ store target PC at stack top
 	dsb
 
-	movw	r0, #(SUN6I_CPUCFG_BASE & 0xffff)
-	movt	r0, #(SUN6I_CPUCFG_BASE >> 16)
+	movw	r0, #(SUNXI_CPUCFG_BASE & 0xffff)
+	movt	r0, #(SUNXI_CPUCFG_BASE >> 16)
 
 	@ CPU mask
 	and	r1, r1, #3	@ only care about first cluster
@@ -189,8 +189,8 @@ psci_cpu_on:
 	str	r6, [r0, #0x100]
 
 	@ re-calculate CPU control register address
-	movw	r0, #(SUN6I_CPUCFG_BASE & 0xffff)
-	movt	r0, #(SUN6I_CPUCFG_BASE >> 16)
+	movw	r0, #(SUNXI_CPUCFG_BASE & 0xffff)
+	movt	r0, #(SUNXI_CPUCFG_BASE >> 16)
 
 	@ Deassert reset on target CPU
 	mov	r6, #3
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
index e15d587f2901..ac8ebf888a4a 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
@@ -73,8 +73,8 @@ psci_fiq_enter:
 	lsr	r9, r9, #10
 	and	r9, r9, #0xf
 
-	movw	r8, #(SUN7I_CPUCFG_BASE & 0xffff)
-	movt	r8, #(SUN7I_CPUCFG_BASE >> 16)
+	movw	r8, #(SUNXI_CPUCFG_BASE & 0xffff)
+	movt	r8, #(SUNXI_CPUCFG_BASE >> 16)
 
 	@ Wait for the core to enter WFI
 	lsl	r11, r9, #6		@ x64
@@ -128,8 +128,8 @@ psci_cpu_on:
 	str	r2, [r0]		@ store target PC at stack top
 	dsb
 
-	movw	r0, #(SUN7I_CPUCFG_BASE & 0xffff)
-	movt	r0, #(SUN7I_CPUCFG_BASE >> 16)
+	movw	r0, #(SUNXI_CPUCFG_BASE & 0xffff)
+	movt	r0, #(SUNXI_CPUCFG_BASE >> 16)
 
 	@ CPU mask
 	and	r1, r1, #3	@ only care about first cluster
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
index 65c0441fe8a2..47e327e71f84 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun4i.h
@@ -18,6 +18,10 @@
 #define SUNXI_SRAM_D_BASE		0x00010000	/* 4 kiB */
 #define SUNXI_SRAM_B_BASE		0x00020000	/* 64 kiB (secure) */
 
+#ifdef CONFIG_MACH_SUN8I_A83T
+#define SUNXI_CPUCFG_BASE		0x01700000
+#endif
+
 #define SUNXI_SRAMC_BASE		0x01c00000
 #define SUNXI_DRAMC_BASE		0x01c01000
 #define SUNXI_DMA_BASE			0x01c02000
@@ -94,7 +98,10 @@
 
 #define SUNXI_TP_BASE			0x01c25000
 #define SUNXI_PMU_BASE			0x01c25400
-#define SUN7I_CPUCFG_BASE              0x01c25c00
+
+#ifdef CONFIG_MACH_SUN7I
+#define SUNXI_CPUCFG_BASE		0x01c25c00
+#endif
 
 #define SUNXI_UART0_BASE		0x01c28000
 #define SUNXI_UART1_BASE		0x01c28400
@@ -148,7 +155,11 @@
 
 #define SUNXI_RTC_BASE			0x01f00000
 #define SUNXI_PRCM_BASE			0x01f01400
-#define SUN6I_CPUCFG_BASE		0x01f01c00
+
+#if defined CONFIG_SUNXI_GEN_SUN6I && !defined CONFIG_MACH_SUN8I_A83T
+#define SUNXI_CPUCFG_BASE		0x01f01c00
+#endif
+
 #define SUNXI_R_TWI_BASE		0x01f02400
 #define SUNXI_R_UART_BASE		0x01f02800
 #define SUNXI_R_PIO_BASE		0x01f02c00
-- 
2.8.1

  parent reply	other threads:[~2016-05-23 12:41 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-23 12:41 [U-Boot] [PATCH 00/10] sunxi: PSCI implementation rewrite in C Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 01/10] ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top() Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 02/10] ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_all Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 03/10] ARM: PSCI: export common PSCI function declarations for C code Chen-Yu Tsai
2016-05-24  9:58   ` Marc Zyngier
2016-05-24 15:55     ` Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 04/10] ARM: allocate extra space for PSCI stack in secure section during link phase Chen-Yu Tsai
2016-05-24 10:21   ` Marc Zyngier
2016-05-24 13:58     ` Marc Zyngier
2016-05-24 15:49       ` Chen-Yu Tsai
2016-05-25 14:31         ` Marc Zyngier
2016-05-23 12:41 ` Chen-Yu Tsai [this message]
2016-05-23 12:41 ` [U-Boot] [PATCH 06/10] sunxi: Group cpu core related controls together Chen-Yu Tsai
2016-05-24  8:15   ` Marc Zyngier
2016-05-24 16:06     ` Chen-Yu Tsai
2016-05-25 14:38       ` Marc Zyngier
2016-05-23 12:41 ` [U-Boot] [PATCH 07/10] sunxi: Add missing linux/types.h header for cpucfg.h Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 08/10] sunxi: Add CPUCFG debug lock and sun7i cpu power controls Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 09/10] sunxi: Add base address for GIC Chen-Yu Tsai
2016-05-23 12:41 ` [U-Boot] [PATCH 10/10] sunxi: Add PSCI implementation in C Chen-Yu Tsai
2016-05-24  8:41   ` Marc Zyngier
2016-05-25  2:14     ` Chen-Yu Tsai
2016-05-25 14:50       ` Marc Zyngier
2016-05-24  6:37 ` [U-Boot] [PATCH 00/10] sunxi: PSCI implementation rewrite " Hongbo Zhang
2016-05-24  9:36 ` Hans de Goede

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1464007306-30269-6-git-send-email-wens@csie.org \
    --to=wens@csie.org \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.