From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753769AbcEXAIj (ORCPT ); Mon, 23 May 2016 20:08:39 -0400 Received: from mail-bl2on0086.outbound.protection.outlook.com ([65.55.169.86]:44880 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753006AbcEXAGG (ORCPT ); Mon, 23 May 2016 20:06:06 -0400 Authentication-Results: arndb.de; dkim=none (message not signed) header.d=none;arndb.de; dmarc=none action=none header.from=caviumnetworks.com; From: Yury Norov To: , , , , , , , CC: , , , , , , , , , , , , , , , , Andrew Pinski Subject: [PATCH 14/23] arm64: ilp32: add is_ilp32_compat_{task,thread} and TIF_32BIT_AARCH64 Date: Tue, 24 May 2016 03:04:43 +0300 Message-ID: <1464048292-30136-15-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> References: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [50.233.148.158] X-ClientProxiedBy: SN1PR16CA0017.namprd16.prod.outlook.com (10.169.34.27) To SN1PR07MB2239.namprd07.prod.outlook.com (10.164.47.145) X-MS-Office365-Filtering-Correlation-Id: 92fc22d7-4d55-4d82-8bd0-08d383672e3d X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2239;2:ndi+nzBlNsPLjBal5ndXT53FbIolTH/zWkq6uu3fvFwY4Db0XT1WZ+9GAP0ASWnxCdxKCBRdU68uO/7Vzjq6tIH1Ey8KjBswjPxBmR3QM+orQmOMv8zHon9LxwUMC6NJNURC6GpjH/rCGi4M1LjpCX0BiTUvh2L0D7AscMJ1Gd+iCScm2uPQ5EjI2nzHgIOH;3:EUNTdA6yh4ZISnQoQBuPrDsVbFGPAddpk7OLLwT+ezrOUslcmb1rgT+FiDIYjYShbeST/T3+Q+W51dyS/pzA5UtOT21MybktR0oFlDg7TRpD0wThzOaH8pYPH5iZLP4c X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:SN1PR07MB2239; X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2239;25:yGpjHVg9XZp5/Ur7BwOxxSobr7PwIf4XNOVhm8RT0v017lR5hjJIbJ1Su+DXn9mT4OijfDg1m2w/ADxC2kwv5cVpneooWOsWHw3gPJ5M0HCY9EQWb+DPoh7y6+WJi68UgQVNI1et737SE1M4v8HYRYY3rAWIzdNcJ6OApN4siGk8w+ADzDiC3iAn0PgQkEg628uPP0LQ8csCAQc3LH0GY+EkH4Ffg6dprBkspxqPD579DF3zzTuYKkqjjuLj0ne1iIKqQ2alAmcErnGroBa4GslqskYxJw9ilHCLeKFo+kRj9FrUGF1+08ii6KM1by5KjxjOxwOfsS7sqB7CkjnZGSNhEth2zHMFB55z/CyATCg/PE0eC5aO6e2tL6DFxAQ2BMbY8tPGB+XnWrXxGyfKV8+ifdUmgvjcc3Ers3CA+XIzHVx5dQWIt5vwTQhardHZj0NkfuKbh0wKnVHKhU+lztBdweF31Dqve7Bi6FKfhXdvuAuzhOTavdq/vAjDf5AW+DD6flR6RuvxScYrHEGPtJ7+XdYLPPe6JhB8HNqL7gHWiTirdrGSaKuQtufLaG7/E1CnFfPdxVshgFLQmW/Icwd178SG9Kp3axvWeLH24Kx97/EpzVkvkB7KlfmRBj/r3dLYDuIAxgz1RJ1nouFn1+xeO4FfLnQl0qCpTEAxHXpE2M9JoGVM0ArhP3sUK/KbBGSseXDo2ypb0+Q8MAO3M21pOUz7qsnaKRBBUzdz7IzSPPvKsFZ5lVnWIERw5KcF14wG4//O7SibJqo4/qn27Q== X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2239;20:GybeE6JtbNSzjOTfV+z4fbMGdXpz5T7ZBGnglT0SQB2OlMoen7VFBaxLNoD5jcKsrziSAyRx3U8xRVDyw9WmLz186/64UjlJY+Ji08dHF3jlSLJUmf2G5WKRvKFEMzw4D2d5SZkrxXpZSGrGDN5rBxE9qZiuyLPLbStyqx3ydBnsjcc4vGMSmJrUmAkw75Lykg2zxkMh2jibDSBMLdB8KiEWcZjJygt+nQus22eebC2jSb2lFmWQj/XFrTNHhJNEYFEfYERLC29t43wxoqogV06+GQo/XhN3slVFqSCR9zJYcDVGFgTu8bx75d6Ej4/lrIKq4skcW190kFuSRQkPvP23TIlXaSp0v0hLdTbfpvrTF+/NvTUamlK5vqAFKVzjW7eZcClGXgVURvzwk0Pu1E3SFKBdjuwIwXItRJRTSJqzSukIVIvRMytrL5RLIzyPLTz2djEI5GRFmG+jWeOa47G4is3mecvS89iRQZCLG2IfLkNi1D11fbiL48JtTCjFoZYQ+ToH2jVmtn5YD5LQDt3FG24kXgjTWW+OlW66pjDZu39+yY815v6dAUACjgMZQQvDFRZyPhJH5qLo6KsH777kMmHKdmhCh33FPXeL9yY= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(5005006)(8121501046)(10201501046)(3002001);SRVR:SN1PR07MB2239;BCL:0;PCL:0;RULEID:;SRVR:SN1PR07MB2239; X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2239;4:vCZgChJviQfZUbDuNjhimpLrqW6oro9OlP1/Lezjyq+hrBuOXv/jHFDw/4mPRnZgIkvSAWas7Y74/fbGU19AcSaFtjn1GtrBBM9uHpJVzwa1tOZfkK6SL6ki1R9q7bjSABbNpgj/DdlHsuLpCjLlJErj65pF60TRb7flw30iz3wMkquaVhhv3Gc8VY19xHI45gKd1EK4z1YAJukzest+2VIzBZ8SrNXQfUid+EjjTJKaOZM6poHDjlcWFAJIEjAv8K0xDQ2sd5IKHM0We9HDQnsuLj6SZOl7aRAeulX0jEY3o3D3rPeGLlK82Ugh8tu0MQPnZJSEvFzPGN2rrqUXw8oqoNLB9821QzlRSmkhERPpNssDXO6LYVKUqwMrgatr X-Forefront-PRVS: 09525C61DB X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(4630300001)(6009001)(76176999)(81166006)(50466002)(107886002)(36756003)(8676002)(47776003)(66066001)(5003940100001)(4001430100002)(48376002)(92566002)(4326007)(5008740100001)(5001770100001)(33646002)(229853001)(50226002)(2906002)(19580395003)(19580405001)(5004730100002)(2201001)(50986999)(2950100001)(42186005)(77096005)(76506005)(189998001)(6116002)(586003)(15760500001)(142933001)(2101003);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1PR07MB2239;H:localhost;FPR:;SPF:None;MLV:sfv;LANG:en; X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1;SN1PR07MB2239;23:Ce77xRoroJCJ0mjgssl+H9bydW+UvDp0TdAGgTbw4?= =?us-ascii?Q?rpFN8/wbIGnBHtRx/5CZNBoTx3UblRojL9W8wad2FC/AsE+iD5OnHJaJ/OQ+?= =?us-ascii?Q?2Eh/MphqPTipH45HkLPjM5yfQHAccl5dn2hKrT5Y+7C7D6iFUN+DOnI+KjM0?= =?us-ascii?Q?ZQUBbKKi/IedwmyDFp9+HYxPA4wdUiFSkanMDrymZlvLsXXQSl4mXmiXp8Vu?= =?us-ascii?Q?pwv8zLzlYyvENYSVU+0R+201EloeIG9Cv05iuCaZK2Qq4o1Vx0X5fOOHwAKj?= =?us-ascii?Q?4gj+48w+Mm9GhOIPCUubdsZRGhQtq/9qbq5D2owJHkZvH+wZFDJzAoYpSamF?= =?us-ascii?Q?rbWC/6KR+cX1GoeiU2Ha8FSvb88i74fgCKYcIVq9lb7fw3gxHULhEAKk05dC?= =?us-ascii?Q?BwU5fsbz6w7/zlHT7maSfeujmv56rMnDgtZ6QhAnRjqFD0tfQ8BKBh5AQRgX?= =?us-ascii?Q?LnUCa7Y0t5nbRaE4W5EfzdMwoK7mz3OPk0PISiNf+3Cefv/51893TXO83tQU?= =?us-ascii?Q?rYf0IegPkdMCq4uVJS2yqey1Gyjfid83wxWA/0AlULnyXIW+PbMItdOWBrSf?= =?us-ascii?Q?XzIrXxaRKPl4ruVkVN23OdudArjsaTyMhhDgrZKUvkXDhfTVNN/dG9PdCJqh?= =?us-ascii?Q?6KFSBRpAHVT2kCLMedXAYT+7UcLZXRuRtCkS7tAN9m31RL/VfDDWu2/Xpfcr?= =?us-ascii?Q?yFnxYAtNyoGD64eX2uppnj6muqe3ukFPJf/XHMjsfsLmPO96kmbySv0D13lA?= =?us-ascii?Q?tAdbg92eck7C0b8FXLa+gc630UZ3ee/hmvZ+9niVuOO/NQ43cdILCAdiFXjc?= =?us-ascii?Q?h/I0UxkTkEOP70NQ65XgxvMs50WT5gZELGq3GkkupU5+5Xcd3pWUvek9Rlwr?= =?us-ascii?Q?uvYnXud1tiJcppVmAFPSGjJK0/oPZV5zon6wJdDr5GRY5VDZ5mercpAA9Usv?= =?us-ascii?Q?FKTZymzccgSsCuJUKENnK1WLrkeoL7Kuabpwx+shsH7rbYakXslUlzOsC281?= =?us-ascii?Q?MhyF4Ka4kr6qM0SGkBKuN7G?= X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2239;5:m4RhRvLRI6YJxE9mZguir1DYTWSV79l4YnE6X2XTFTY/YKpQU1XbWdu6bx3CSfIz3aOMXWvaX9BFRa+YrtOfZnY/anp7WI1v7I4/wUfHbhRS3IahgVbZxUyE0sG1Q7eVHjhrMvb2plQ9f9bz7vbyCg==;24:H7IP/jfFl6nqsahS414H6kfAflRSBjK/5BSYy8YKhD5mZC4nOOEPz89A3aDlS0rq5pHTCpX4AI7XYy2lGHq8KyD/S8BUvIbLHBwVlsNx0NE=;7:y/9Cx2CFrH7OBTK9dEpwdTeBurAZGV49KGkYmgEQOmSNFJZ9H15I/RtKWDh31jL1OocOSA2eMhzhwgjVfDf5d9FkvsG9CVVl0eh6REcG7EgFSG6JPjXMJeAYBfK+8vW2QrLeJ7wtoVse7TgxA4fQCWwmN+pRLws3ojA+jtaYQBCtt3jS4y7vGlORLuijfRyc SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2016 00:05:56.8308 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR07MB2239 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ILP32 tasks are needed to be distinguished from lp64 and aarch32. This patch adds helper functions is_ilp32_compat_{task,thread} and thread flag TIF_32BIT_AARCH64 to address it. This is a preparation for following patches in ilp32 patchset. For consistency, SET_PERSONALITY is changed here accordingly. Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Yury Norov Reviewed-by: David Daney --- arch/arm64/include/asm/elf.h | 13 +++++++++++-- arch/arm64/include/asm/is_compat.h | 28 +++++++++++++++++++++++++++- arch/arm64/include/asm/thread_info.h | 2 ++ 3 files changed, 40 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index b5437c5..e18bb8a 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -142,7 +142,11 @@ typedef struct user_fpsimd_state elf_fpregset_t; */ #define ELF_PLAT_INIT(_r, load_addr) (_r)->regs[0] = 0 -#define SET_PERSONALITY(ex) clear_thread_flag(TIF_32BIT); +#define SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + clear_thread_flag(TIF_32BIT); \ +} while (0) #define ARCH_DLINFO \ do { \ @@ -181,7 +185,12 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; ((x)->e_flags & EF_ARM_EABI_MASK)) #define compat_start_thread compat_start_thread -#define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); +#define COMPAT_SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + set_thread_flag(TIF_32BIT); \ +} while (0) + #define COMPAT_ARCH_DLINFO extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp); diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h index 6139b5a..55134cf 100644 --- a/arch/arm64/include/asm/is_compat.h +++ b/arch/arm64/include/asm/is_compat.h @@ -45,11 +45,37 @@ static inline int is_a32_compat_thread(struct thread_info *thread) #endif /* CONFIG_AARCH32_EL0 */ +#ifdef CONFIG_ARM64_ILP32 + +static inline int is_ilp32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT_AARCH64); +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT_AARCH64); +} + +#else + +static inline int is_ilp32_compat_task(void) +{ + return 0; +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_ARM64_ILP32 */ + #ifdef CONFIG_COMPAT static inline int is_compat_task(void) { - return is_a32_compat_task(); + return is_a32_compat_task() || is_ilp32_compat_task(); } #endif /* CONFIG_COMPAT */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 4daa559..8802645 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -119,6 +119,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 #define TIF_32BIT 22 /* AARCH32 process */ +#define TIF_32BIT_AARCH64 23 /* 32 bit process on AArch64(ILP32) */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) @@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) #define _TIF_SECCOMP (1 << TIF_SECCOMP) #define _TIF_32BIT (1 << TIF_32BIT) +#define _TIF_32BIT_AARCH64 (1 << TIF_32BIT_AARCH64) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE) -- 2.5.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yury Norov Subject: [PATCH 14/23] arm64: ilp32: add is_ilp32_compat_{task,thread} and TIF_32BIT_AARCH64 Date: Tue, 24 May 2016 03:04:43 +0300 Message-ID: <1464048292-30136-15-git-send-email-ynorov@caviumnetworks.com> References: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> Sender: linux-kernel-owner@vger.kernel.org List-Archive: List-Post: To: arnd@arndb.de, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, libc-alpha@sourceware.org Cc: schwidefsky@de.ibm.com, heiko.carstens@de.ibm.com, ynorov@caviumnetworks.com, pinskia@gmail.com, broonie@kernel.org, joseph@codesourcery.com, christoph.muellner@theobroma-systems.com, bamvor.zhangjian@huawei.com, szabolcs.nagy@arm.com, klimov.linux@gmail.com, Nathan_Lynch@mentor.com, agraf@suse.de, Prasun.Kapoor@caviumnetworks.com, kilobyte@angband.pl, geert@linux-m68k.org, philipp.tomsich@theobroma-systems.com, Andrew Pinski List-ID: ILP32 tasks are needed to be distinguished from lp64 and aarch32. This patch adds helper functions is_ilp32_compat_{task,thread} and thread flag TIF_32BIT_AARCH64 to address it. This is a preparation for following patches in ilp32 patchset. For consistency, SET_PERSONALITY is changed here accordingly. Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Yury Norov Reviewed-by: David Daney --- arch/arm64/include/asm/elf.h | 13 +++++++++++-- arch/arm64/include/asm/is_compat.h | 28 +++++++++++++++++++++++++++- arch/arm64/include/asm/thread_info.h | 2 ++ 3 files changed, 40 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index b5437c5..e18bb8a 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -142,7 +142,11 @@ typedef struct user_fpsimd_state elf_fpregset_t; */ #define ELF_PLAT_INIT(_r, load_addr) (_r)->regs[0] = 0 -#define SET_PERSONALITY(ex) clear_thread_flag(TIF_32BIT); +#define SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + clear_thread_flag(TIF_32BIT); \ +} while (0) #define ARCH_DLINFO \ do { \ @@ -181,7 +185,12 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; ((x)->e_flags & EF_ARM_EABI_MASK)) #define compat_start_thread compat_start_thread -#define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); +#define COMPAT_SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + set_thread_flag(TIF_32BIT); \ +} while (0) + #define COMPAT_ARCH_DLINFO extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp); diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h index 6139b5a..55134cf 100644 --- a/arch/arm64/include/asm/is_compat.h +++ b/arch/arm64/include/asm/is_compat.h @@ -45,11 +45,37 @@ static inline int is_a32_compat_thread(struct thread_info *thread) #endif /* CONFIG_AARCH32_EL0 */ +#ifdef CONFIG_ARM64_ILP32 + +static inline int is_ilp32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT_AARCH64); +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT_AARCH64); +} + +#else + +static inline int is_ilp32_compat_task(void) +{ + return 0; +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_ARM64_ILP32 */ + #ifdef CONFIG_COMPAT static inline int is_compat_task(void) { - return is_a32_compat_task(); + return is_a32_compat_task() || is_ilp32_compat_task(); } #endif /* CONFIG_COMPAT */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 4daa559..8802645 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -119,6 +119,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 #define TIF_32BIT 22 /* AARCH32 process */ +#define TIF_32BIT_AARCH64 23 /* 32 bit process on AArch64(ILP32) */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) @@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) #define _TIF_SECCOMP (1 << TIF_SECCOMP) #define _TIF_32BIT (1 << TIF_32BIT) +#define _TIF_32BIT_AARCH64 (1 << TIF_32BIT_AARCH64) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE) -- 2.5.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: ynorov@caviumnetworks.com (Yury Norov) Date: Tue, 24 May 2016 03:04:43 +0300 Subject: [PATCH 14/23] arm64: ilp32: add is_ilp32_compat_{task, thread} and TIF_32BIT_AARCH64 In-Reply-To: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> References: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> Message-ID: <1464048292-30136-15-git-send-email-ynorov@caviumnetworks.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ILP32 tasks are needed to be distinguished from lp64 and aarch32. This patch adds helper functions is_ilp32_compat_{task,thread} and thread flag TIF_32BIT_AARCH64 to address it. This is a preparation for following patches in ilp32 patchset. For consistency, SET_PERSONALITY is changed here accordingly. Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Yury Norov Reviewed-by: David Daney --- arch/arm64/include/asm/elf.h | 13 +++++++++++-- arch/arm64/include/asm/is_compat.h | 28 +++++++++++++++++++++++++++- arch/arm64/include/asm/thread_info.h | 2 ++ 3 files changed, 40 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index b5437c5..e18bb8a 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -142,7 +142,11 @@ typedef struct user_fpsimd_state elf_fpregset_t; */ #define ELF_PLAT_INIT(_r, load_addr) (_r)->regs[0] = 0 -#define SET_PERSONALITY(ex) clear_thread_flag(TIF_32BIT); +#define SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + clear_thread_flag(TIF_32BIT); \ +} while (0) #define ARCH_DLINFO \ do { \ @@ -181,7 +185,12 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; ((x)->e_flags & EF_ARM_EABI_MASK)) #define compat_start_thread compat_start_thread -#define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); +#define COMPAT_SET_PERSONALITY(ex) \ +do { \ + clear_thread_flag(TIF_32BIT_AARCH64); \ + set_thread_flag(TIF_32BIT); \ +} while (0) + #define COMPAT_ARCH_DLINFO extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp); diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h index 6139b5a..55134cf 100644 --- a/arch/arm64/include/asm/is_compat.h +++ b/arch/arm64/include/asm/is_compat.h @@ -45,11 +45,37 @@ static inline int is_a32_compat_thread(struct thread_info *thread) #endif /* CONFIG_AARCH32_EL0 */ +#ifdef CONFIG_ARM64_ILP32 + +static inline int is_ilp32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT_AARCH64); +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT_AARCH64); +} + +#else + +static inline int is_ilp32_compat_task(void) +{ + return 0; +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_ARM64_ILP32 */ + #ifdef CONFIG_COMPAT static inline int is_compat_task(void) { - return is_a32_compat_task(); + return is_a32_compat_task() || is_ilp32_compat_task(); } #endif /* CONFIG_COMPAT */ diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 4daa559..8802645 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -119,6 +119,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 #define TIF_32BIT 22 /* AARCH32 process */ +#define TIF_32BIT_AARCH64 23 /* 32 bit process on AArch64(ILP32) */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) @@ -130,6 +131,7 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) #define _TIF_SECCOMP (1 << TIF_SECCOMP) #define _TIF_32BIT (1 << TIF_32BIT) +#define _TIF_32BIT_AARCH64 (1 << TIF_32BIT_AARCH64) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE) -- 2.5.0