From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59268) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7KUO-0001wM-NV for qemu-devel@nongnu.org; Mon, 30 May 2016 06:32:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7KUM-0005GW-Od for qemu-devel@nongnu.org; Mon, 30 May 2016 06:32:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44507) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7KUM-0005GH-J5 for qemu-devel@nongnu.org; Mon, 30 May 2016 06:32:02 -0400 From: Peter Xu Date: Mon, 30 May 2016 18:31:16 +0800 Message-Id: <1464604298-16739-4-git-send-email-peterx@redhat.com> In-Reply-To: <1464604298-16739-1-git-send-email-peterx@redhat.com> References: <1464604298-16739-1-git-send-email-peterx@redhat.com> Subject: [Qemu-devel] [PATCH v8 03/25] intel_iommu: set IR bit for ECAP register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, mst@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com, alex.williamson@redhat.com, wexu@redhat.com, davidkiarie4@gmail.com, peterx@redhat.com Enable IR in IOMMU Extended Capability register. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 7 +++++++ hw/i386/intel_iommu_internal.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 4b0558e..17668d6 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -24,6 +24,7 @@ #include "exec/address-spaces.h" #include "intel_iommu_internal.h" #include "hw/pci/pci.h" +#include "hw/boards.h" /*#define DEBUG_INTEL_IOMMU*/ #ifdef DEBUG_INTEL_IOMMU @@ -1941,6 +1942,8 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn) */ static void vtd_init(IntelIOMMUState *s) { + MachineState *ms = MACHINE(qdev_get_machine()); + memset(s->csr, 0, DMAR_REG_SIZE); memset(s->wmask, 0, DMAR_REG_SIZE); memset(s->w1cmask, 0, DMAR_REG_SIZE); @@ -1961,6 +1964,10 @@ static void vtd_init(IntelIOMMUState *s) VTD_CAP_SAGAW | VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS; s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO; + if (ms->iommu_intr) { + s->ecap |= VTD_ECAP_IR; + } + vtd_reset_context_cache(s); vtd_reset_iotlb(s); diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index b648e69..5b98a11 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -176,6 +176,8 @@ /* (offset >> 4) << 8 */ #define VTD_ECAP_IRO (DMAR_IOTLB_REG_OFFSET << 4) #define VTD_ECAP_QI (1ULL << 1) +/* Interrupt Remapping support */ +#define VTD_ECAP_IR (1ULL << 3) /* CAP_REG */ /* (offset >> 4) << 24 */ -- 2.4.11