From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753344AbcFAV5K (ORCPT ); Wed, 1 Jun 2016 17:57:10 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51021 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752531AbcFAVny (ORCPT ); Wed, 1 Jun 2016 17:43:54 -0400 From: Gerd Hoffmann To: linux-rpi-kernel@lists.infradead.org Cc: Eric Anholt , Gerd Hoffmann , Florian Fainelli , Ray Jui , Scott Branden , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 05/32] ARM: bcm2835: Add devicetree for the Raspberry Pi 3. Date: Wed, 1 Jun 2016 23:43:14 +0200 Message-Id: <1464817421-8519-6-git-send-email-kraxel@redhat.com> In-Reply-To: <1464817421-8519-1-git-send-email-kraxel@redhat.com> References: <1464817421-8519-1-git-send-email-kraxel@redhat.com> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 01 Jun 2016 21:43:53 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Eric Anholt While this devicetree also works for booting in 32-bit mode, it's placed in arm64 since it's a 64-bit CPU (as suggested by Arnd). v2: Move to arm64/ instead of arm/ Signed-off-by: Eric Anholt Acked-by: Stephen Warren (v1) [ kraxel: drop bcm2837-rpi-3-b.dtb from arm(32) Makefile ] Signed-off-by: Gerd Hoffmann --- arch/arm64/boot/dts/broadcom/Makefile | 1 + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 29 ++++++++++ arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 74 ++++++++++++++++++++++++ 3 files changed, 104 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837.dtsi diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index bec1f8b..05faf2a 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts new file mode 100644 index 0000000..223793d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts @@ -0,0 +1,29 @@ +/dts-v1/; +#include "bcm2837.dtsi" +#include "../../../../arm/boot/dts/bcm2835-rpi.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + memory { + reg = <0 0x40000000>; + }; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi new file mode 100644 index 0000000..2320f8d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi @@ -0,0 +1,74 @@ +#include "../../../../arm/boot/dts/bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e8>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000f0>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gerd Hoffmann Subject: [PATCH 05/32] ARM: bcm2835: Add devicetree for the Raspberry Pi 3. Date: Wed, 1 Jun 2016 23:43:14 +0200 Message-ID: <1464817421-8519-6-git-send-email-kraxel@redhat.com> References: <1464817421-8519-1-git-send-email-kraxel@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1464817421-8519-1-git-send-email-kraxel@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux-rpi-kernel@lists.infradead.org Cc: Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Florian Fainelli , Catalin Marinas , Pawel Moll , Scott Branden , Ian Campbell , Ray Jui , Will Deacon , open list , Eric Anholt , Rob Herring , "open list:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE..." , Gerd Hoffmann , Kumar Gala , "moderated list:ARM64 PORT AARCH64 ARCHITECTURE" List-Id: devicetree@vger.kernel.org From: Eric Anholt While this devicetree also works for booting in 32-bit mode, it's placed in arm64 since it's a 64-bit CPU (as suggested by Arnd). v2: Move to arm64/ instead of arm/ Signed-off-by: Eric Anholt Acked-by: Stephen Warren (v1) [ kraxel: drop bcm2837-rpi-3-b.dtb from arm(32) Makefile ] Signed-off-by: Gerd Hoffmann --- arch/arm64/boot/dts/broadcom/Makefile | 1 + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 29 ++++++++++ arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 74 ++++++++++++++++++++++++ 3 files changed, 104 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837.dtsi diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index bec1f8b..05faf2a 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts new file mode 100644 index 0000000..223793d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts @@ -0,0 +1,29 @@ +/dts-v1/; +#include "bcm2837.dtsi" +#include "../../../../arm/boot/dts/bcm2835-rpi.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + memory { + reg = <0 0x40000000>; + }; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi new file mode 100644 index 0000000..2320f8d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi @@ -0,0 +1,74 @@ +#include "../../../../arm/boot/dts/bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e8>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000f0>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; -- 1.8.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: kraxel@redhat.com (Gerd Hoffmann) Date: Wed, 1 Jun 2016 23:43:14 +0200 Subject: [PATCH 05/32] ARM: bcm2835: Add devicetree for the Raspberry Pi 3. In-Reply-To: <1464817421-8519-1-git-send-email-kraxel@redhat.com> References: <1464817421-8519-1-git-send-email-kraxel@redhat.com> Message-ID: <1464817421-8519-6-git-send-email-kraxel@redhat.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Eric Anholt While this devicetree also works for booting in 32-bit mode, it's placed in arm64 since it's a 64-bit CPU (as suggested by Arnd). v2: Move to arm64/ instead of arm/ Signed-off-by: Eric Anholt Acked-by: Stephen Warren (v1) [ kraxel: drop bcm2837-rpi-3-b.dtb from arm(32) Makefile ] Signed-off-by: Gerd Hoffmann --- arch/arm64/boot/dts/broadcom/Makefile | 1 + arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 29 ++++++++++ arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 74 ++++++++++++++++++++++++ 3 files changed, 104 insertions(+) create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2837.dtsi diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile index bec1f8b..05faf2a 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -1,3 +1,4 @@ +dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts new file mode 100644 index 0000000..223793d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts @@ -0,0 +1,29 @@ +/dts-v1/; +#include "bcm2837.dtsi" +#include "../../../../arm/boot/dts/bcm2835-rpi.dtsi" + +/ { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; + model = "Raspberry Pi 3 Model B"; + + memory { + reg = <0 0x40000000>; + }; + + leds { + act { + gpios = <&gpio 47 0>; + }; + + pwr { + label = "PWR"; + gpios = <&gpio 35 0>; + default-state = "keep"; + linux,default-trigger = "default-on"; + }; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi new file mode 100644 index 0000000..2320f8d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi @@ -0,0 +1,74 @@ +#include "../../../../arm/boot/dts/bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0>; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e0>; + }; + + cpu2: cpu at 2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e8>; + }; + + cpu3: cpu at 3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000f0>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; -- 1.8.3.1