From: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
To: dev@dpdk.org
Cc: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Subject: [PATCH v3 7/7] examples/ip_pipeline: update edge router usecase
Date: Wed, 8 Jun 2016 12:35:25 +0200 [thread overview]
Message-ID: <1465382125-2747-8-git-send-email-piotrx.t.azarewicz@intel.com> (raw)
In-Reply-To: <1465382125-2747-1-git-send-email-piotrx.t.azarewicz@intel.com>
Update edge router usecase config files to use bulk commands.
Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
.../ip_pipeline/config/edge_router_downstream.cfg | 30 +++++++++++-----
.../ip_pipeline/config/edge_router_downstream.sh | 7 ++--
.../ip_pipeline/config/edge_router_upstream.cfg | 36 +++++++++++++------
.../ip_pipeline/config/edge_router_upstream.sh | 37 +++++++++-----------
4 files changed, 67 insertions(+), 43 deletions(-)
diff --git a/examples/ip_pipeline/config/edge_router_downstream.cfg b/examples/ip_pipeline/config/edge_router_downstream.cfg
index 85bbab8..c6b4e1f 100644
--- a/examples/ip_pipeline/config/edge_router_downstream.cfg
+++ b/examples/ip_pipeline/config/edge_router_downstream.cfg
@@ -1,6 +1,6 @@
; BSD LICENSE
;
-; Copyright(c) 2015 Intel Corporation. All rights reserved.
+; Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
@@ -36,9 +36,9 @@
; network) contains the following functional blocks: Packet RX & Routing,
; Traffic management and Packet TX. The input packets are assumed to be
; IPv4, while the output packets are Q-in-Q IPv4.
-
+;
; A simple implementation for this functional pipeline is presented below.
-
+;
; Packet Rx & Traffic Management Packet Tx
; Routing (Pass-Through) (Pass-Through)
; _____________________ SWQ0 ______________________ SWQ4 _____________________
@@ -50,11 +50,23 @@
; | | SWQ3 | | SWQ7 | |
; RXQ3.0 --->| |----->| |----->| |---> TXQ3.0
; |_____________________| |______________________| |_____________________|
-; | _|_ ^ _|_ ^ _|_ ^ _|_ ^
-; | |___|||___|||___|||___||
-; +--> SINK0 |___|||___|||___|||___||
-; (route miss) |__| |__| |__| |__|
-; TM0 TM1 TM2 TM3
+; | | ^ | ^ | ^ | ^
+; | |__| |__| |__| |__|
+; +--> SINK0 TM0 TM1 TM2 TM3
+; (Default)
+;
+; Input packet: Ethernet/IPv4
+; Output packet: Ethernet/QinQ/IPv4
+;
+; Packet buffer layout:
+; # Field Name Offset (Bytes) Size (Bytes)
+; 0 Mbuf 0 128
+; 1 Headroom 128 128
+; 2 Ethernet header 256 14
+; 3 IPv4 header 270 20
+
+[EAL]
+log_level = 0
[PIPELINE0]
type = MASTER
@@ -67,7 +79,7 @@ pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0
pktq_out = SWQ0 SWQ1 SWQ2 SWQ3 SINK0
encap = ethernet_qinq
qinq_sched = test
-ip_hdr_offset = 270; mbuf (128) + headroom (128) + ethernet header (14) = 270
+ip_hdr_offset = 270
[PIPELINE2]
type = PASS-THROUGH
diff --git a/examples/ip_pipeline/config/edge_router_downstream.sh b/examples/ip_pipeline/config/edge_router_downstream.sh
index ce46beb..67c3a0d 100644
--- a/examples/ip_pipeline/config/edge_router_downstream.sh
+++ b/examples/ip_pipeline/config/edge_router_downstream.sh
@@ -1,3 +1,7 @@
+#
+# run ./config/edge_router_downstream.sh
+#
+
################################################################################
# Routing: Ether QinQ, ARP off
################################################################################
@@ -6,5 +10,4 @@ p 1 route add 0.0.0.0 10 port 0 ether a0:b0:c0:d0:e0:f0 qinq 256 257
p 1 route add 0.64.0.0 10 port 1 ether a1:b1:c1:d1:e1:f1 qinq 258 259
p 1 route add 0.128.0.0 10 port 2 ether a2:b2:c2:d2:e2:f2 qinq 260 261
p 1 route add 0.192.0.0 10 port 3 ether a3:b3:c3:d3:e3:f3 qinq 262 263
-
-p 1 route ls
+#p 1 route ls
diff --git a/examples/ip_pipeline/config/edge_router_upstream.cfg b/examples/ip_pipeline/config/edge_router_upstream.cfg
index a08c5cc..dea42b9 100644
--- a/examples/ip_pipeline/config/edge_router_upstream.cfg
+++ b/examples/ip_pipeline/config/edge_router_upstream.cfg
@@ -1,6 +1,6 @@
; BSD LICENSE
;
-; Copyright(c) 2015 Intel Corporation. All rights reserved.
+; Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
@@ -29,6 +29,7 @@
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
; An edge router typically sits between two networks such as the provider
; core network and the provider access network. A typical packet processing
; pipeline for the upstream traffic (i.e. traffic from access to core
@@ -36,10 +37,10 @@
; Flow classification, Metering, Routing and Packet TX. The input packets
; are assumed to be Q-in-Q IPv4, while the output packets are MPLS IPv4
; (with variable number of labels per route).
-
+;
; A simple implementation for this functional pipeline is presented below.
-
-; Packet Rx & Pass-Through Flow-Classification Flow-Actions Routing
+;
+; Packet RX & Pass-Through Flow Classification Flow Actions Routing
: Firewall
; __________ SWQ0 __________ SWQ4 __________ SWQ8 __________ SWQ12 __________
; RXQ0.0 --->| |------>| |------>| |------>| |------>| |------> TXQ0.0
@@ -51,8 +52,21 @@
; RXQ3.0 --->| |------>| |------>| |------>| |------>| |------> TXQ3.0
; |__________| |__________| |__________| |__________| |__________|
; | | |
-; +--> SINK0 (Default) +--> SINK1 (Default) +--> SINK2 (Route Miss)
+; +--> SINK0 (Default) +--> SINK1 (Default) +--> SINK2 (Default)
+;
+; Input packet: Ethernet/QinQ/IPv4
+; Output packet: Ethernet/MPLS/IPv4
+;
+; Packet buffer layout:
+; # Field Name Offset (Bytes) Size (Bytes)
+; 0 Mbuf 0 128
+; 1 Headroom 128 128
+; 2 Ethernet header 256 14
+; 3 QinQ header 270 8
+; 4 IPv4 header 278 20
+[EAL]
+log_level = 0
[PIPELINE0]
type = MASTER
@@ -72,10 +86,10 @@ core = 2
pktq_in = SWQ0 SWQ1 SWQ2 SWQ3
pktq_out = SWQ4 SWQ5 SWQ6 SWQ7
dma_size = 8
-dma_dst_offset = 128; mbuf (128)
-dma_src_offset = 268; mbuf (128) + headroom (128) + 1st ethertype offset (12) = 268
+dma_dst_offset = 128
+dma_src_offset = 268; 1st Ethertype offset
dma_src_mask = 00000FFF00000FFF; qinq
-dma_hash_offset = 136; dma_dst_offset + dma_size = 136
+dma_hash_offset = 136; dma_dst_offset + dma_size
[PIPELINE3]
type = FLOW_CLASSIFICATION
@@ -86,7 +100,7 @@ n_flows = 65536
key_size = 8; dma_size
key_offset = 128; dma_dst_offset
hash_offset = 136; dma_hash_offset
-flowid_offset = 192; mbuf (128) + 64
+flowid_offset = 192
[PIPELINE4]
type = FLOW_ACTIONS
@@ -96,7 +110,7 @@ pktq_out = SWQ12 SWQ13 SWQ14 SWQ15
n_flows = 65536
n_meters_per_flow = 1
flow_id_offset = 192; flowid_offset
-ip_hdr_offset = 278; mbuf (128) + headroom (128) + ethernet (14) + qinq (8) = 278
+ip_hdr_offset = 278
color_offset = 196; flowid_offset + sizeof(flow_id)
[PIPELINE5]
@@ -106,5 +120,5 @@ pktq_in = SWQ12 SWQ13 SWQ14 SWQ15
pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0 SINK2
encap = ethernet_mpls
mpls_color_mark = yes
-ip_hdr_offset = 278; mbuf (128) + headroom (128) + ethernet (14) + qinq (8) = 278
+ip_hdr_offset = 278
color_offset = 196; flowid_offset + sizeof(flow_id)
diff --git a/examples/ip_pipeline/config/edge_router_upstream.sh b/examples/ip_pipeline/config/edge_router_upstream.sh
index eeba600..5d574c1 100644
--- a/examples/ip_pipeline/config/edge_router_upstream.sh
+++ b/examples/ip_pipeline/config/edge_router_upstream.sh
@@ -1,24 +1,26 @@
-################################################
-# Firewall Rules:4 for 4 ports
-################################################
-p 1 firewall add ipv4 1 0.0.0.0 8 0.0.0.0 10 0 0 0 0 6 1 0
-p 1 firewall add ipv4 1 0.0.0.0 8 0.64.0.0 10 0 0 0 0 6 1 1
-p 1 firewall add ipv4 1 0.0.0.0 8 0.128.0.0 10 0 0 0 0 6 1 2
-p 1 firewall add ipv4 1 0.0.0.0 8 0.192.0.0 10 0 0 0 0 6 1 3
-p 1 firewall add default 4 #SINK0
+#
+# run ./config/edge_router_upstream.sh
+#
+################################################################################
+# Firewall
+################################################################################
+p 1 firewall add default 4 #SINK0
+p 1 firewall add bulk ./config/edge_router_upstream_firewall.txt
+#p 1 firewall ls
################################################################################
-# Flow classification
+# Flow Classification
################################################################################
p 3 flow add default 4 #SINK1
-p 3 flow add qinq all 65536 4
+p 3 flow add qinq bulk ./config/edge_router_upstream_flow.txt
+#p 3 flow ls
################################################################################
-# Flow Actions - Metering
+# Flow Actions - Metering and Policing
################################################################################
-p 4 flows 65536 meter 0 trtcm 1250000000 1250000000 100000000 100000000
-p 4 flows 65536 ports 4
+p 4 action flow bulk ./config/edge_router_upstream_action.txt
+#p 4 action flow ls
################################################################################
# Routing: Ether MPLS, ARP off
@@ -28,11 +30,4 @@ p 5 route add 0.0.0.0 10 port 0 ether a0:b0:c0:d0:e0:f0 mpls 0:1
p 5 route add 0.64.0.0 10 port 1 ether a1:b1:c1:d1:e1:f1 mpls 10:11
p 5 route add 0.128.0.0 10 port 2 ether a2:b2:c2:d2:e2:f2 mpls 20:21
p 5 route add 0.192.0.0 10 port 3 ether a3:b3:c3:d3:e3:f3 mpls 30:31
-
-################################################################################
-# List all configurations
-################################################################################
-p 1 firewall ls
-#p 3 flow ls
-#p 4 flow actions ls
-p 5 route ls
+#p 5 route ls
--
1.7.9.5
next prev parent reply other threads:[~2016-06-08 10:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-06 15:57 [PATCH 0/6] ip_pipeline: CLI rework and improvements Michal Jastrzebski
2016-05-06 15:57 ` [PATCH 1/6] examples/ip_pipeline: add helper functions for parsing string Michal Jastrzebski
2016-05-06 15:57 ` [PATCH 2/6] examples/ip_pipeline: modifies common pipeline CLI Michal Jastrzebski
2016-05-06 15:57 ` [PATCH 3/6] examples/ip_pipeline: modifies routing commands Michal Jastrzebski
2016-05-06 15:57 ` [PATCH 4/6] examples/ip_pipeline: modifies firewall pipeline CLI Michal Jastrzebski
2016-05-06 15:57 ` [PATCH 5/6] examples/ip_pipeline: modifies flow classifications " Michal Jastrzebski
2016-05-06 15:57 ` [PATCH 6/6] examples/ip_pipeline: modifies flow action " Michal Jastrzebski
2016-05-20 14:35 ` [PATCH v2 0/7] examples/ip_pipeline: CLI rework and improvements Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 1/7] examples/ip_pipeline: add helper functions for parsing string Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 2/7] examples/ip_pipeline: modifies common pipeline CLI Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 3/7] examples/ip_pipeline: modifies firewall " Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 4/7] examples/ip_pipeline: modifies flow classifications " Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 5/7] examples/ip_pipeline: modifies flow action " Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 6/7] examples/ip_pipeline: modifies routing " Piotr Azarewicz
2016-05-20 14:35 ` [PATCH v2 7/7] examples/ip_pipeline: update edge router usecase Piotr Azarewicz
2016-06-07 20:34 ` [PATCH v2 0/7] examples/ip_pipeline: CLI rework and improvements Thomas Monjalon
2016-06-08 10:01 ` Azarewicz, PiotrX T
2016-06-08 10:35 ` [PATCH v3 " Piotr Azarewicz
2016-06-08 10:35 ` [PATCH v3 1/7] examples/ip_pipeline: add helper functions for parsing string Piotr Azarewicz
2016-06-08 10:35 ` [PATCH v3 2/7] examples/ip_pipeline: modifies common pipeline CLI Piotr Azarewicz
2016-06-08 10:35 ` [PATCH v3 3/7] examples/ip_pipeline: modifies firewall " Piotr Azarewicz
2016-06-08 10:35 ` [PATCH v3 4/7] examples/ip_pipeline: modifies flow classifications " Piotr Azarewicz
2016-06-08 10:35 ` [PATCH v3 5/7] examples/ip_pipeline: modifies flow action " Piotr Azarewicz
2016-06-08 10:35 ` [PATCH v3 6/7] examples/ip_pipeline: modifies routing " Piotr Azarewicz
2016-06-08 10:35 ` Piotr Azarewicz [this message]
2016-06-08 14:46 ` [PATCH v3 0/7] examples/ip_pipeline: CLI rework and improvements Thomas Monjalon
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