From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37354) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bBJDh-0001Ar-8A for qemu-devel@nongnu.org; Fri, 10 Jun 2016 05:59:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bBJDf-0007RC-7n for qemu-devel@nongnu.org; Fri, 10 Jun 2016 05:59:16 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:45037 helo=mail.rt-rk.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bBJDf-0007R6-0j for qemu-devel@nongnu.org; Fri, 10 Jun 2016 05:59:15 -0400 From: Aleksandar Markovic Date: Fri, 10 Jun 2016 11:57:30 +0200 Message-Id: <1465552668-30084-4-git-send-email-aleksandar.markovic@rt-rk.com> In-Reply-To: <1465552668-30084-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1465552668-30084-1-git-send-email-aleksandar.markovic@rt-rk.com> Subject: [Qemu-devel] [PATCH v9 03/10] softfloat: For Mips only, correct default NaN values List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, aurelien@aurel32.net, leon.alrae@imgtec.com, petar.jovanovic@imgtec.com, miodrag.dinic@imgtec.com, aleksandar.markovic@imgtec.com From: Aleksandar Markovic Only for Mips platform, and only for cases when snan_bit_is_one is 0, correct default NaN values (in their 16-, 32-, and 64-bit flavors). For more info, see [1], page 84, Table 6.3 "Value Supplied When a New Quiet NaN Is Created", and [2], page 52, Table 3.7 "Default NaN Encodings". [1] "MIPS Architecture For Programmers Volume II-A: The MIPS64 Instruction Set Reference Manual", Imagination Technologies LTD, Revision 6.04, November 13, 2015 [2] "MIPS Architecture for Programmers Volume IV-j: The MIPS32 SIMD Architecture Module", Imagination Technologies LTD, Revision 1.12, February 3, 2016 Reviewed-by: Leon Alrae Signed-off-by: Aleksandar Markovic --- fpu/softfloat-specialize.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 981d665..a1bcb46 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -97,7 +97,11 @@ float16 float16_default_nan(float_status *status) if (status->snan_bit_is_one) { return const_float16(0x7DFF); } else { +#if defined(TARGET_MIPS) + return const_float16(0x7E00); +#else return const_float16(0xFE00); +#endif } #endif } @@ -116,7 +120,11 @@ float32 float32_default_nan(float_status *status) if (status->snan_bit_is_one) { return const_float32(0x7FBFFFFF); } else { +#if defined(TARGET_MIPS) + return const_float32(0x7FC00000); +#else return const_float32(0xFFC00000); +#endif } #endif } @@ -135,7 +143,11 @@ float64 float64_default_nan(float_status *status) if (status->snan_bit_is_one) { return const_float64(LIT64(0x7FF7FFFFFFFFFFFF)); } else { +#if defined(TARGET_MIPS) + return const_float64(LIT64(0x7FF8000000000000)); +#else return const_float64(LIT64(0xFFF8000000000000)); +#endif } #endif } -- 1.9.1