From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37393) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bBJE1-0001T8-FH for qemu-devel@nongnu.org; Fri, 10 Jun 2016 05:59:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bBJDw-0007Tk-G1 for qemu-devel@nongnu.org; Fri, 10 Jun 2016 05:59:37 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:45078 helo=mail.rt-rk.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bBJDw-0007Tg-8w for qemu-devel@nongnu.org; Fri, 10 Jun 2016 05:59:32 -0400 From: Aleksandar Markovic Date: Fri, 10 Jun 2016 11:57:31 +0200 Message-Id: <1465552668-30084-5-git-send-email-aleksandar.markovic@rt-rk.com> In-Reply-To: <1465552668-30084-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1465552668-30084-1-git-send-email-aleksandar.markovic@rt-rk.com> Subject: [Qemu-devel] [PATCH v9 04/10] softfloat: For Mips only, correct order in pickNaNMulAdd() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, aurelien@aurel32.net, leon.alrae@imgtec.com, petar.jovanovic@imgtec.com, miodrag.dinic@imgtec.com, aleksandar.markovic@imgtec.com From: Aleksandar Markovic Only for Mips platform, and only for cases when snan_bit_is_one is 0, correct the order of argument comparisons in pickNaNMulAdd(). For more info, see [1], page 53, section "3.5.3 NaN Propagation". [1] "MIPS Architecture for Programmers Volume IV-j: The MIPS32 SIMD Architecture Module", Imagination Technologies LTD, Revision 1.12, February 3, 2016 Reviewed-by: Leon Alrae Signed-off-by: Aleksandar Markovic --- fpu/softfloat-specialize.h | 41 +++++++++++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index a1bcb46..4063561 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -571,19 +571,36 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, return 3; } - /* Prefer sNaN over qNaN, in the a, b, c order. */ - if (aIsSNaN) { - return 0; - } else if (bIsSNaN) { - return 1; - } else if (cIsSNaN) { - return 2; - } else if (aIsQNaN) { - return 0; - } else if (bIsQNaN) { - return 1; + if (status->snan_bit_is_one) { + /* Prefer sNaN over qNaN, in the c, a, b order. */ + if (cIsSNaN) { + return 2; + } else if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (cIsQNaN) { + return 2; + } else if (aIsQNaN) { + return 0; + } else { + return 1; + } } else { - return 2; + /* Prefer sNaN over qNaN, in the a, b, c order. */ + if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (cIsSNaN) { + return 2; + } else if (aIsQNaN) { + return 0; + } else if (bIsQNaN) { + return 1; + } else { + return 2; + } } } #elif defined(TARGET_PPC) -- 1.9.1