From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56094) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCKNG-000113-8j for qemu-devel@nongnu.org; Mon, 13 Jun 2016 01:25:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCKNB-0001y2-9L for qemu-devel@nongnu.org; Mon, 13 Jun 2016 01:25:21 -0400 Received: from 8.mo178.mail-out.ovh.net ([46.105.74.227]:52119) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCKNB-0001xl-37 for qemu-devel@nongnu.org; Mon, 13 Jun 2016 01:25:17 -0400 Received: from player791.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 48EBC1000C9C for ; Mon, 13 Jun 2016 07:25:16 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 13 Jun 2016 07:24:48 +0200 Message-Id: <1465795496-15071-3-git-send-email-clg@kaod.org> In-Reply-To: <1465795496-15071-1-git-send-email-clg@kaod.org> References: <1465795496-15071-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 02/10] ppc: Create cpu_ppc_set_papr() helper (for LPCR) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Benjamin Herrenschmidt , Cedric Le Goater From: Benjamin Herrenschmidt And move the code adjusting the MSR mask and calling kvmppc_set_papr() to it. This allows us to add a few more things such as disabling setting of MSR:HV and appropriate LPCR bits which will be used when fixing the exception model. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson [clg: previous commit 26a7f1291bb5 did not include the LPCR setting as it was not needed at the time ] Signed-off-by: C=C3=A9dric Le Goater --- target-ppc/translate_init.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index ca894ff4af45..edfd91a85425 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -8509,6 +8509,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) void cpu_ppc_set_papr(PowerPCCPU *cpu) { CPUPPCState *env =3D &cpu->env; + ppc_spr_t *lpcr =3D &env->spr_cb[SPR_LPCR]; ppc_spr_t *amor =3D &env->spr_cb[SPR_AMOR]; =20 /* PAPR always has exception vectors in RAM not ROM. To ensure this, @@ -8518,6 +8519,19 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu) */ env->msr_mask &=3D ~((1ull << MSR_EP) | MSR_HVB); =20 + /* Set emulated LPCR to not send interrupts to hypervisor. Note that + * under KVM, the actual HW LPCR will be set differently by KVM itse= lf, + * the settings below ensure proper operations with TCG in absence o= f + * a real hypervisor + */ + lpcr->default_value &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_K= BV); + lpcr->default_value |=3D LPCR_LPES0 | LPCR_LPES1; + + /* We should be followed by a CPU reset but update the active value + * just in case... + */ + env->spr[SPR_LPCR] =3D lpcr->default_value; + /* Set a full AMOR so guest can use the AMR as it sees fit */ env->spr[SPR_AMOR] =3D amor->default_value =3D 0xffffffffffffffffull= ; =20 --=20 2.1.4