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From: Zhi Wang <zhi.a.wang@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: zhiyuan.lv@intel.com
Subject: [PATCH v11 9/9] drm/i915: Introduce GVT context creation API
Date: Tue, 14 Jun 2016 09:21:21 -0400	[thread overview]
Message-ID: <1465910481-11212-10-git-send-email-zhi.a.wang@intel.com> (raw)
In-Reply-To: <1465910481-11212-1-git-send-email-zhi.a.wang@intel.com>

GVT workload scheduler needs special host LRC contexts, the so called
"shadow LRC context" to submit guest workload to host i915. During the
guest workload submission, workload scheduler fills the shadow LRC
context with the content of guest LRC context: engine context is copied
without changes, ring context is mostly owned by host i915.

v8:

- Remove the graph temporarily. (Chris)
- Use interruptible mutex_lock. (Chris)
- Rename the function name of creating a GVT context. (Chris)
- Add the missing declaration in i915_drv.h (Chris)

v7:

- Move chart to a better place. (Joonas)

v6:

- Make GVT code as dead code when !CONFIG_DRM_I915_GVT. (Chris)

v5:
- Only compile this feature when CONFIG_DRM_I915_GVT is enabled. (Tvrtko)
- Rebase the code into new repo.
- Add a comment about the ring buffer size. (Joonas)

v2:

Mostly based on Daniel's idea. Call the refactored core logic of GEM
context creation service and LRC context creation service to create the GVT
context.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |  2 ++
 drivers/gpu/drm/i915/i915_gem_context.c | 34 +++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 34a1c18..6c1540d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3475,6 +3475,8 @@ int i915_switch_context(struct drm_i915_gem_request *req);
 void i915_gem_context_free(struct kref *ctx_ref);
 struct drm_i915_gem_object *
 i915_gem_alloc_context_obj(struct drm_device *dev, size_t size);
+struct i915_gem_context *
+i915_gem_context_create_gvt(struct drm_device *dev);
 
 static inline struct i915_gem_context *
 i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index d9e30e1..30d9b4f 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -343,6 +343,40 @@ i915_gem_create_context(struct drm_device *dev,
 	return ctx;
 }
 
+/**
+ * i915_gem_context_create_gvt - create a GVT GEM context
+ * @dev: drm device *
+ *
+ * This function is used to create a GVT specific GEM context.
+ *
+ * Returns:
+ * pointer to i915_gem_context on success, error pointer if failed
+ *
+ */
+struct i915_gem_context *
+i915_gem_context_create_gvt(struct drm_device *dev)
+{
+	struct i915_gem_context *ctx;
+	int ret;
+
+	if (!IS_ENABLED(CONFIG_DRM_I915_GVT))
+		return ERR_PTR(-ENODEV);
+
+	ret = i915_mutex_lock_interruptible(dev);
+	if (ret)
+		return ERR_PTR(ret);
+
+	ctx = i915_gem_create_context(dev, NULL);
+	if (IS_ERR(ctx))
+		goto out;
+
+	ctx->execlists_force_single_submission = true;
+	ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
+out:
+	mutex_unlock(&dev->struct_mutex);
+	return ctx;
+}
+
 static void i915_gem_context_unpin(struct i915_gem_context *ctx,
 				   struct intel_engine_cs *engine)
 {
-- 
1.9.1

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  parent reply	other threads:[~2016-06-14 13:21 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-14 13:21 [PATCH v11 0/9] Introduce the implementation of GVT context Zhi Wang
2016-06-14 13:21 ` [PATCH v11 1/9] drm/i915: Factor out i915_pvinfo.h Zhi Wang
2016-06-14 13:21 ` [PATCH v11 2/9] drm/i915: Use offsetof() to calculate the offset of members in PVINFO page Zhi Wang
2016-06-14 13:21 ` [PATCH v11 3/9] drm/i915: Fold vGPU active check into inner functions Zhi Wang
2016-06-14 13:21 ` [PATCH v11 4/9] drm/i915: gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-06-14 13:21 ` [PATCH v11 5/9] drm/i915: Make ring buffer size of a LRC context configurable Zhi Wang
2016-06-14 13:21 ` [PATCH v11 6/9] drm/i915: Make addressing mode bits in context descriptor configurable Zhi Wang
2016-06-14 13:21 ` [PATCH v11 7/9] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-06-14 13:21 ` [PATCH v11 8/9] drm/i915: Support LRC context single submission Zhi Wang
2016-06-14 13:21 ` Zhi Wang [this message]
2016-06-14 13:52 ` ✗ Ro.CI.BAT: warning for Introduce the implementation of GVT context (rev9) Patchwork
2016-06-14 14:07   ` Wang, Zhi A
2016-06-15  2:32 ` [PATCH v11 0/9] Introduce the implementation of GVT context Tian, Kevin

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