From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933229AbcFOOwa (ORCPT ); Wed, 15 Jun 2016 10:52:30 -0400 Received: from fw-tnat.cambridge.arm.com ([217.140.96.140]:23732 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932432AbcFOOwP (ORCPT ); Wed, 15 Jun 2016 10:52:15 -0400 From: Liviu Dudau To: David Airlie , Rob Herring , Brian Starkey , Emil Velikov , Daniel Vetter Cc: devicetree , DRI devel , LKML , David Brown , LAKML , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Subject: [PATCH v5 1/3] dt/bindings: display: Add DT bindings for Mali Display Processors. Date: Wed, 15 Jun 2016 15:51:33 +0100 Message-Id: <1466002295-24813-2-git-send-email-Liviu.Dudau@arm.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1466002295-24813-1-git-send-email-Liviu.Dudau@arm.com> References: <1466002295-24813-1-git-send-email-Liviu.Dudau@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DT bindings documentation for the Mali Display Processor. The bindings describe the Mali DP500, DP550 and DP650 processors from ARM Ltd. Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Signed-off-by: Liviu Dudau Acked-by: Rob Herring --- .../devicetree/bindings/display/arm,malidp.txt | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt new file mode 100644 index 0000000..2f78709 --- /dev/null +++ b/Documentation/devicetree/bindings/display/arm,malidp.txt @@ -0,0 +1,65 @@ +ARM Mali-DP + +The following bindings apply to a family of Display Processors sold as +licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and +DP650 processors that offer multiple composition layers, support for +rotation and scaling output. + +Required properties: + - compatible: should be one of + "arm,mali-dp500" + "arm,mali-dp550" + "arm,mali-dp650" + depending on the particular implementation present in the hardware + - reg: Physical base address and size of the block of registers used by + the processor. + - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt, + interrupt client nodes. + - interrupt-names: name of the engine inside the processor that will + use the corresponding interrupt. Should be one of "DE" or "SE". + - clocks: A list of phandle + clock-specifier pairs, one for each entry + in 'clock-names' + - clock-names: A list of clock names. It should contain: + - "pclk": for the APB interface clock + - "aclk": for the AXI interface clock + - "mclk": for the main processor clock + - "pxlclk": for the pixel clock feeding the output PLL of the processor. + - arm,malidp-output-port-lines: Array of u8 values describing the number + of output lines per channel (R, G and B). + +Required sub-nodes: + - port: The Mali DP connection to an encoder input port. The connection + is modelled using the OF graph bindings specified in + Documentation/devicetree/bindings/graph.txt + +Optional properties: + - memory-region: phandle to a node describing memory (see + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) + to be used for the framebuffer; if not present, the framebuffer may + be located anywhere in memory. + + +Example: + +/ { + ... + + dp0: malidp@6f200000 { + compatible = "arm,mali-dp650"; + reg = <0 0x6f200000 0 0x20000>; + memory-region = <&display_reserved>; + interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>, + <0 168 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "DE", "SE"; + clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>; + clock-names = "pxlclk", "mclk", "aclk", "pclk"; + arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; + port { + dp0_output: endpoint { + remote-endpoint = <&tda998x_2_input>; + }; + }; + }; + + ... +}; -- 2.8.2 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Liviu Dudau Subject: [PATCH v5 1/3] dt/bindings: display: Add DT bindings for Mali Display Processors. Date: Wed, 15 Jun 2016 15:51:33 +0100 Message-ID: <1466002295-24813-2-git-send-email-Liviu.Dudau@arm.com> References: <1466002295-24813-1-git-send-email-Liviu.Dudau@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1466002295-24813-1-git-send-email-Liviu.Dudau@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: David Airlie , Rob Herring , Brian Starkey , Emil Velikov , Daniel Vetter Cc: Mark Rutland , devicetree , Pawel Moll , Ian Campbell , LKML , DRI devel , Kumar Gala , LAKML List-Id: devicetree@vger.kernel.org QWRkIERUIGJpbmRpbmdzIGRvY3VtZW50YXRpb24gZm9yIHRoZSBNYWxpIERpc3BsYXkgUHJvY2Vz c29yLiBUaGUgYmluZGluZ3MKZGVzY3JpYmUgdGhlIE1hbGkgRFA1MDAsIERQNTUwIGFuZCBEUDY1 MCBwcm9jZXNzb3JzIGZyb20gQVJNIEx0ZC4KCkNjOiBQYXdlbCBNb2xsIDxwYXdlbC5tb2xsQGFy bS5jb20+CkNjOiBNYXJrIFJ1dGxhbmQgPG1hcmsucnV0bGFuZEBhcm0uY29tPgpDYzogSWFuIENh bXBiZWxsIDxpamMrZGV2aWNldHJlZUBoZWxsaW9uLm9yZy51az4KQ2M6IEt1bWFyIEdhbGEgPGdh bGFrQGNvZGVhdXJvcmEub3JnPgoKU2lnbmVkLW9mZi1ieTogTGl2aXUgRHVkYXUgPExpdml1LkR1 ZGF1QGFybS5jb20+CkFja2VkLWJ5OiBSb2IgSGVycmluZyA8cm9iaEBrZXJuZWwub3JnPgotLS0K IC4uLi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Rpc3BsYXkvYXJtLG1hbGlkcC50eHQgICAgIHwgNjUg KysrKysrKysrKysrKysrKysrKysrKwogMSBmaWxlIGNoYW5nZWQsIDY1IGluc2VydGlvbnMoKykK IGNyZWF0ZSBtb2RlIDEwMDY0NCBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlz cGxheS9hcm0sbWFsaWRwLnR4dAoKZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJl ZS9iaW5kaW5ncy9kaXNwbGF5L2FybSxtYWxpZHAudHh0IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0 cmVlL2JpbmRpbmdzL2Rpc3BsYXkvYXJtLG1hbGlkcC50eHQKbmV3IGZpbGUgbW9kZSAxMDA2NDQK aW5kZXggMDAwMDAwMC4uMmY3ODcwOQotLS0gL2Rldi9udWxsCisrKyBiL0RvY3VtZW50YXRpb24v ZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L2FybSxtYWxpZHAudHh0CkBAIC0wLDAgKzEsNjUg QEAKK0FSTSBNYWxpLURQCisKK1RoZSBmb2xsb3dpbmcgYmluZGluZ3MgYXBwbHkgdG8gYSBmYW1p bHkgb2YgRGlzcGxheSBQcm9jZXNzb3JzIHNvbGQgYXMKK2xpY2Vuc2FibGUgSVAgYnkgQVJNIEx0 ZC4gVGhlIGJpbmRpbmdzIGRlc2NyaWJlIHRoZSBNYWxpIERQNTAwLCBEUDU1MCBhbmQKK0RQNjUw IHByb2Nlc3NvcnMgdGhhdCBvZmZlciBtdWx0aXBsZSBjb21wb3NpdGlvbiBsYXllcnMsIHN1cHBv cnQgZm9yCityb3RhdGlvbiBhbmQgc2NhbGluZyBvdXRwdXQuCisKK1JlcXVpcmVkIHByb3BlcnRp ZXM6CisgIC0gY29tcGF0aWJsZTogc2hvdWxkIGJlIG9uZSBvZgorCSJhcm0sbWFsaS1kcDUwMCIK KwkiYXJtLG1hbGktZHA1NTAiCisJImFybSxtYWxpLWRwNjUwIgorICAgIGRlcGVuZGluZyBvbiB0 aGUgcGFydGljdWxhciBpbXBsZW1lbnRhdGlvbiBwcmVzZW50IGluIHRoZSBoYXJkd2FyZQorICAt IHJlZzogUGh5c2ljYWwgYmFzZSBhZGRyZXNzIGFuZCBzaXplIG9mIHRoZSBibG9jayBvZiByZWdp c3RlcnMgdXNlZCBieQorICAgIHRoZSBwcm9jZXNzb3IuCisgIC0gaW50ZXJydXB0czogSW50ZXJy dXB0IGxpc3QsIGFzIGRlZmluZWQgaW4gLi4vaW50ZXJydXB0LWNvbnRyb2xsZXIvaW50ZXJydXB0 cy50eHQsCisgICAgaW50ZXJydXB0IGNsaWVudCBub2Rlcy4KKyAgLSBpbnRlcnJ1cHQtbmFtZXM6 IG5hbWUgb2YgdGhlIGVuZ2luZSBpbnNpZGUgdGhlIHByb2Nlc3NvciB0aGF0IHdpbGwKKyAgICB1 c2UgdGhlIGNvcnJlc3BvbmRpbmcgaW50ZXJydXB0LiBTaG91bGQgYmUgb25lIG9mICJERSIgb3Ig IlNFIi4KKyAgLSBjbG9ja3M6IEEgbGlzdCBvZiBwaGFuZGxlICsgY2xvY2stc3BlY2lmaWVyIHBh aXJzLCBvbmUgZm9yIGVhY2ggZW50cnkKKyAgICBpbiAnY2xvY2stbmFtZXMnCisgIC0gY2xvY2st bmFtZXM6IEEgbGlzdCBvZiBjbG9jayBuYW1lcy4gSXQgc2hvdWxkIGNvbnRhaW46CisgICAgICAt ICJwY2xrIjogZm9yIHRoZSBBUEIgaW50ZXJmYWNlIGNsb2NrCisgICAgICAtICJhY2xrIjogZm9y IHRoZSBBWEkgaW50ZXJmYWNlIGNsb2NrCisgICAgICAtICJtY2xrIjogZm9yIHRoZSBtYWluIHBy b2Nlc3NvciBjbG9jaworICAgICAgLSAicHhsY2xrIjogZm9yIHRoZSBwaXhlbCBjbG9jayBmZWVk aW5nIHRoZSBvdXRwdXQgUExMIG9mIHRoZSBwcm9jZXNzb3IuCisgIC0gYXJtLG1hbGlkcC1vdXRw dXQtcG9ydC1saW5lczogQXJyYXkgb2YgdTggdmFsdWVzIGRlc2NyaWJpbmcgdGhlIG51bWJlcgor ICAgIG9mIG91dHB1dCBsaW5lcyBwZXIgY2hhbm5lbCAoUiwgRyBhbmQgQikuCisKK1JlcXVpcmVk IHN1Yi1ub2RlczoKKyAgLSBwb3J0OiBUaGUgTWFsaSBEUCBjb25uZWN0aW9uIHRvIGFuIGVuY29k ZXIgaW5wdXQgcG9ydC4gVGhlIGNvbm5lY3Rpb24KKyAgICBpcyBtb2RlbGxlZCB1c2luZyB0aGUg T0YgZ3JhcGggYmluZGluZ3Mgc3BlY2lmaWVkIGluCisgICAgRG9jdW1lbnRhdGlvbi9kZXZpY2V0 cmVlL2JpbmRpbmdzL2dyYXBoLnR4dAorCitPcHRpb25hbCBwcm9wZXJ0aWVzOgorICAtIG1lbW9y eS1yZWdpb246IHBoYW5kbGUgdG8gYSBub2RlIGRlc2NyaWJpbmcgbWVtb3J5IChzZWUKKyAgICBE b2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvcmVzZXJ2ZWQtbWVtb3J5L3Jlc2VydmVk LW1lbW9yeS50eHQpCisgICAgdG8gYmUgdXNlZCBmb3IgdGhlIGZyYW1lYnVmZmVyOyBpZiBub3Qg cHJlc2VudCwgdGhlIGZyYW1lYnVmZmVyIG1heQorICAgIGJlIGxvY2F0ZWQgYW55d2hlcmUgaW4g bWVtb3J5LgorCisKK0V4YW1wbGU6CisKKy8geworCS4uLgorCisJZHAwOiBtYWxpZHBANmYyMDAw MDAgeworCQljb21wYXRpYmxlID0gImFybSxtYWxpLWRwNjUwIjsKKwkJcmVnID0gPDAgMHg2ZjIw MDAwMCAwIDB4MjAwMDA+OworCQltZW1vcnktcmVnaW9uID0gPCZkaXNwbGF5X3Jlc2VydmVkPjsK KwkJaW50ZXJydXB0cyA9IDwwIDE2OCBJUlFfVFlQRV9MRVZFTF9ISUdIPiwKKwkJCSAgICAgPDAg MTY4IElSUV9UWVBFX0xFVkVMX0hJR0g+OworCQlpbnRlcnJ1cHQtbmFtZXMgPSAiREUiLCAiU0Ui OworCQljbG9ja3MgPSA8Jm9zY2NsazI+LCA8JmZwZ2Fvc2MwPiwgPCZmcGdhb3NjMT4sIDwmZnBn YW9zYzE+OworCQljbG9jay1uYW1lcyA9ICJweGxjbGsiLCAibWNsayIsICJhY2xrIiwgInBjbGsi OworCQlhcm0sbWFsaWRwLW91dHB1dC1wb3J0LWxpbmVzID0gL2JpdHMvIDggPDggOCA4PjsKKwkJ cG9ydCB7CisJCQlkcDBfb3V0cHV0OiBlbmRwb2ludCB7CisJCQkJcmVtb3RlLWVuZHBvaW50ID0g PCZ0ZGE5OTh4XzJfaW5wdXQ+OworCQkJfTsKKwkJfTsKKwl9OworCisJLi4uCit9OwotLSAKMi44 LjIKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRyaS1k ZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: Liviu.Dudau@arm.com (Liviu Dudau) Date: Wed, 15 Jun 2016 15:51:33 +0100 Subject: [PATCH v5 1/3] dt/bindings: display: Add DT bindings for Mali Display Processors. In-Reply-To: <1466002295-24813-1-git-send-email-Liviu.Dudau@arm.com> References: <1466002295-24813-1-git-send-email-Liviu.Dudau@arm.com> Message-ID: <1466002295-24813-2-git-send-email-Liviu.Dudau@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add DT bindings documentation for the Mali Display Processor. The bindings describe the Mali DP500, DP550 and DP650 processors from ARM Ltd. Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Signed-off-by: Liviu Dudau Acked-by: Rob Herring --- .../devicetree/bindings/display/arm,malidp.txt | 65 ++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt new file mode 100644 index 0000000..2f78709 --- /dev/null +++ b/Documentation/devicetree/bindings/display/arm,malidp.txt @@ -0,0 +1,65 @@ +ARM Mali-DP + +The following bindings apply to a family of Display Processors sold as +licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and +DP650 processors that offer multiple composition layers, support for +rotation and scaling output. + +Required properties: + - compatible: should be one of + "arm,mali-dp500" + "arm,mali-dp550" + "arm,mali-dp650" + depending on the particular implementation present in the hardware + - reg: Physical base address and size of the block of registers used by + the processor. + - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt, + interrupt client nodes. + - interrupt-names: name of the engine inside the processor that will + use the corresponding interrupt. Should be one of "DE" or "SE". + - clocks: A list of phandle + clock-specifier pairs, one for each entry + in 'clock-names' + - clock-names: A list of clock names. It should contain: + - "pclk": for the APB interface clock + - "aclk": for the AXI interface clock + - "mclk": for the main processor clock + - "pxlclk": for the pixel clock feeding the output PLL of the processor. + - arm,malidp-output-port-lines: Array of u8 values describing the number + of output lines per channel (R, G and B). + +Required sub-nodes: + - port: The Mali DP connection to an encoder input port. The connection + is modelled using the OF graph bindings specified in + Documentation/devicetree/bindings/graph.txt + +Optional properties: + - memory-region: phandle to a node describing memory (see + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) + to be used for the framebuffer; if not present, the framebuffer may + be located anywhere in memory. + + +Example: + +/ { + ... + + dp0: malidp at 6f200000 { + compatible = "arm,mali-dp650"; + reg = <0 0x6f200000 0 0x20000>; + memory-region = <&display_reserved>; + interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>, + <0 168 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "DE", "SE"; + clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>; + clock-names = "pxlclk", "mclk", "aclk", "pclk"; + arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; + port { + dp0_output: endpoint { + remote-endpoint = <&tda998x_2_input>; + }; + }; + }; + + ... +}; -- 2.8.2