From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39439) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDF3T-0007wI-4T for qemu-devel@nongnu.org; Wed, 15 Jun 2016 13:56:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bDF3L-0007vV-Sz for qemu-devel@nongnu.org; Wed, 15 Jun 2016 13:56:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34769) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bDF3L-0007v5-Mt for qemu-devel@nongnu.org; Wed, 15 Jun 2016 13:56:35 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 116E672091 for ; Wed, 15 Jun 2016 17:56:34 +0000 (UTC) From: Markus Armbruster Date: Wed, 15 Jun 2016 19:56:30 +0200 Message-Id: <1466013391-16028-2-git-send-email-armbru@redhat.com> In-Reply-To: <1466013391-16028-1-git-send-email-armbru@redhat.com> References: <1466013391-16028-1-git-send-email-armbru@redhat.com> Subject: [Qemu-devel] [PATCH 1/2] piix: Set I440FXState member pci_info.w32 in one place List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mst@redhat.com, imammedo@redhat.com, ehabkost@redhat.com, marcel@redhat.com Range pci_info.w32 records the location of the PCI hole. It's initialized to empty when QOM zeroes I440FXState. That's a fine value for a still unknown PCI hole. i440fx_init() sets pci_info.w32.begin = below_4g_mem_size. Changes the PCI hole from empty to [below_4g_mem_size, UINT64_MAX]. That's a bogus value. i440fx_pcihost_initfn() sets pci_info.end = IO_APIC_DEFAULT_ADDRESS. Since i440fx_init() ran already, this changes the PCI hole to [below_4g_mem_size, IO_APIC_DEFAULT_ADDRESS-1]. That's the correct value. Setting the bounds of the PCI hole in two separate places is confusing, and begs the question whether the bogus intermediate value could be used by something, or what would happen if we somehow managed to realize an i440FX device without having run the board init function i440fx_init() first. Avoid the confusion by setting the (constant) upper bound along with the lower bound in i440fx_init(). Signed-off-by: Markus Armbruster --- hw/pci-host/piix.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index df2b0e2..c63c424 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -263,7 +263,6 @@ static void i440fx_pcihost_get_pci_hole64_end(Object *obj, Visitor *v, static void i440fx_pcihost_initfn(Object *obj) { PCIHostState *s = PCI_HOST_BRIDGE(obj); - I440FXState *d = I440FX_PCI_HOST_BRIDGE(obj); memory_region_init_io(&s->conf_mem, obj, &pci_host_conf_le_ops, s, "pci-conf-idx", 4); @@ -285,8 +284,6 @@ static void i440fx_pcihost_initfn(Object *obj) object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "int", i440fx_pcihost_get_pci_hole64_end, NULL, NULL, NULL, NULL); - - d->pci_info.w32.end = IO_APIC_DEFAULT_ADDRESS; } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) @@ -348,6 +345,7 @@ PCIBus *i440fx_init(const char *host_type, const char *pci_type, i440fx = I440FX_PCI_HOST_BRIDGE(dev); i440fx->pci_info.w32.begin = below_4g_mem_size; + i440fx->pci_info.w32.end = IO_APIC_DEFAULT_ADDRESS; /* setup pci memory mapping */ pc_pci_as_mapping_init(OBJECT(f), f->system_memory, -- 2.5.5